diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2017-12-07 16:16:27 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-23 23:04:09 +0000 |
| commit | 94ef4a8a476a66931eb2b2f7f8573fed52956d0f (patch) | |
| tree | 0c1019d32a18af727c467ec5552a3744c982a503 /src/mainboard/intel | |
| parent | c0c2d457a5f74999c0a195361d649e7e473bad8e (diff) | |
mainboard/glkrvp: Ignore DMIC_DATA pin IOSSTATE
Audio DMIC_DATA needs to be ON in S0ix to support Wake on Voice.
By doing this, SoC can see the DMIC DATA and use for WoV processing.
Thus configuring GPIO_173 as IGNORE IOSSTATE.
TEST=put DUT in S0ix, verify DUT wakes up
Change-Id: I8bf403564e927deb8fed7f415e334bb230107cb0
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/23246
Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/glkrvp/variants/baseboard/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index 9014aa54b2..0646bcf6a5 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -208,7 +208,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_170, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S1_MCLK*/ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_171, DN_20K, DEEP, NF1),/*AVS_M_CLK_A1*/ PAD_CFG_NF_IOSSTATE(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_B1*/ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, DN_20K, DEEP, NF1, HIZCRx1, ENPD),/*AVS_M_DATA_1*/ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_173, DN_20K, DEEP, NF1),/*AVS_M_DATA_1*/ PAD_CFG_NF_IOSSTATE(GPIO_174, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_AB2*/ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_175, DN_20K, DEEP, NF1, HIZCRx1, ENPD),/*AVS_M_DATA_2*/ |