diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-12-18 13:16:06 +0100 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-12-19 22:52:13 +0000 |
commit | 6ebb3b60a451b094376ddeff1c3b7b405190f62d (patch) | |
tree | 72ec7d641056d53a119f7e40eb403936dd158d11 /src/mainboard/intel | |
parent | 52ad86693999dc1544f0568ad75efbc0e44b15cc (diff) |
mainboard: Fix comment about early GPIOs
These boards program the early GPIO table in bootblock, not romstage.
Change-Id: Iae9353d106483f30cefa2d035d96e63e4c127261
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Sean Rhodes <admin@starlabs.systems>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/mainboard/intel')
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h index fe8c2e210c..aaec3ebf87 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h @@ -257,7 +257,7 @@ static const struct pad_config gpio_table[] = { /* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1), }; -/* Early pad configuration in romstage. */ +/* Early pad configuration in bootblock. */ static const struct pad_config early_gpio_table[] = { /* UART0_RXD */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/gpio.h index e0292cfa86..26eb1d9f83 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/gpio.h @@ -193,7 +193,7 @@ static const struct pad_config gpio_table[] = { /* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1), }; -/* Early pad configuration in romstage. */ +/* Early pad configuration in bootblock. */ static const struct pad_config early_gpio_table[] = { /* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h index a60850545f..d2e76d9632 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/gpio.h @@ -193,7 +193,7 @@ static const struct pad_config gpio_table[] = { /* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1), }; -/* Early pad configuration in romstage. */ +/* Early pad configuration in bootblock. */ static const struct pad_config early_gpio_table[] = { /* UART0_RXD */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp8/include/variant/gpio.h index 5b588a10c3..44997c7263 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/include/variant/gpio.h +++ b/src/mainboard/intel/kblrvp/variants/rvp8/include/variant/gpio.h @@ -159,7 +159,7 @@ static const struct pad_config gpio_table[] = { }; -/* Early pad configuration in romstage. */ +/* Early pad configuration in bootblock. */ static const struct pad_config early_gpio_table[] = { /* UART0_RXD */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), diff --git a/src/mainboard/intel/kunimitsu/gpio.h b/src/mainboard/intel/kunimitsu/gpio.h index 439bd8992b..a436d8fbf6 100644 --- a/src/mainboard/intel/kunimitsu/gpio.h +++ b/src/mainboard/intel/kunimitsu/gpio.h @@ -217,7 +217,7 @@ static const struct pad_config gpio_table[] = { /* LANPHYC */ PAD_NC(GPD11, NONE), }; -/* Early pad configuration in romstage. */ +/* Early pad configuration in bootblock. */ static const struct pad_config early_gpio_table[] = { /* SRCCLKREQ2# */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* KEPLER */ /* SPI_WP_STATUS */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, UP_20K, DEEP), diff --git a/src/mainboard/intel/saddlebrook/gpio.h b/src/mainboard/intel/saddlebrook/gpio.h index f60515b8ec..b012462875 100644 --- a/src/mainboard/intel/saddlebrook/gpio.h +++ b/src/mainboard/intel/saddlebrook/gpio.h @@ -245,7 +245,7 @@ static const struct pad_config gpio_table[] = { /* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1), }; -/* Early pad configuration in romstage. */ +/* Early pad configuration in bootblock. */ static const struct pad_config early_gpio_table[] = { /* UART0_CTS# */ PAD_CFG_GPO(GPP_C11, 1, DEEP), /* EN_PP3300_KEPLER */ }; |