diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2024-05-06 13:37:11 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-06-05 10:59:59 +0000 |
| commit | 4e5655a7567cc9b34caec56f14ae5da56e04d5d3 (patch) | |
| tree | e6d7fefff13282363d6c12cae02e67f36ff55e57 /src/mainboard/intel | |
| parent | e1664278a7d7911432c910721ee5f3510678ceb0 (diff) | |
Xeon-SP boards: Factor out OCP VPD `get_cxl_mode()` impl
There's two copies of the `get_cxl_mode()` function to map the OCP VPD
value to the values expected by platform code. As this is unnecessary,
have a single copy of this function in the OCP VPD driver code. As the
`get_cxl_mode()` function is Xeon-SP only, keep it in a separate file.
This change simplifies things for boards using OCP VPD for CXL and has
no impact for boards *not* using OCP VPD:
- Boards not using OCP VPD can still define get_cxl_mode() in mainboard
code as needed, just like they were able to do before.
- Boards using OCP VPD but without CXL (`SOC_INTEL_HAS_CXL` is not
enabled), this code won't get compiled in at all (see `Makefile.mk`).
- Boards using OCP VPD and CXL will automatically make use of this
`get_cxl_mode()` definition, which should be the same for all boards.
It is possible that this may need to be expanded/adapted in the future,
which is easy to handle in a follow-up commit when the need arises.
TEST=Build and boot on intel/archercity CRB
Change-Id: I935c4eb5b2392e2d0dc01b9f66d46c79b8141ea7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82224
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/archercity_crb/Makefile.mk | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/archercity_crb/util.c | 19 |
2 files changed, 0 insertions, 21 deletions
diff --git a/src/mainboard/intel/archercity_crb/Makefile.mk b/src/mainboard/intel/archercity_crb/Makefile.mk index b28d73c27a..4c7a7beee1 100644 --- a/src/mainboard/intel/archercity_crb/Makefile.mk +++ b/src/mainboard/intel/archercity_crb/Makefile.mk @@ -2,7 +2,5 @@ bootblock-y += bootblock.c romstage-y += romstage.c -romstage-y += util.c ramstage-y += ramstage.c -ramstage-y += util.c CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include diff --git a/src/mainboard/intel/archercity_crb/util.c b/src/mainboard/intel/archercity_crb/util.c deleted file mode 100644 index 33afeca8d3..0000000000 --- a/src/mainboard/intel/archercity_crb/util.c +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <drivers/ocp/include/vpd.h> -#include <soc/config.h> - -#if CONFIG(SOC_INTEL_HAS_CXL) && CONFIG(OCP_VPD) -enum xeonsp_cxl_mode get_cxl_mode(void) -{ - int ocp_cxl_mode = get_cxl_mode_from_vpd(); - switch (ocp_cxl_mode) { - case CXL_SYSTEM_MEMORY: - return XEONSP_CXL_SYS_MEM; - case CXL_SPM: - return XEONSP_CXL_SP_MEM; - default: - return XEONSP_CXL_DISABLED; - } -} -#endif |