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authorFelix Held <felix-coreboot@felixheld.de>2019-10-07 19:09:43 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-10-08 18:08:19 +0000
commit4a0899fe5248db78d4d443af7eb098cc323d2a9c (patch)
treed64e8435a0d6dd30941fc6a44580d6b76f0c33d3 /src/mainboard/intel
parentfa120eb2af7f306f42eb15007c2a6eb8528407ce (diff)
intel/dcp847ske: use functions from hwm5_conf.h for HWM setup
Change-Id: I67de5260a756fc7b1cf0ec1903bee0058a2dcb06 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/dcp847ske/superio.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/intel/dcp847ske/superio.h b/src/mainboard/intel/dcp847ske/superio.h
index 56938e7026..6f74d3e72c 100644
--- a/src/mainboard/intel/dcp847ske/superio.h
+++ b/src/mainboard/intel/dcp847ske/superio.h
@@ -18,6 +18,7 @@
#define DCP847SKE_SUPERIO_H
#include <arch/io.h>
+#include <superio/hwm5_conf.h>
#define NUVOTON_PORT 0x4e
#define HWM_PORT 0x0a30
@@ -44,11 +45,6 @@
#define SUPERIO_WRITE_INITVAL(val) SUPERIO_WRITE((val) >> 8, (val) & 0xff)
-#define HWM_WRITE(reg, data) do { \
- outb((reg), HWM_PORT + 5); \
- outb((data), HWM_PORT + 6); \
-} while (0)
-
-#define HWM_WRITE_INITVAL(val) HWM_WRITE((val) >> 8, (val) & 0xff)
+#define HWM_WRITE_INITVAL(val) pnp_write_hwm5_index(HWM_PORT, (val) >> 8, (val) & 0xff)
#endif /* DCP847SKE_SUPERIO_H */