summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorMartin Roth <martin.roth@se-eng.com>2014-12-08 10:53:19 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-09 03:02:39 +0100
commita0a71b046a44e6aa6e73469989b949db2e6a1a4d (patch)
tree3bf36bbb76bc67e115ada8aedb99d67736659ee9 /src/mainboard/intel
parentc43bce57f70bb740cf4e750018a7af7be29c6d6f (diff)
fsp platfoms: add prototype & consolidate main entry-point
- In '-ffreestanding' main() is just as any other function and so it needs a type-signature. Fixes a clang warning. - Bay Trail and Rangeley have the updated romstage.c with the code moved into the chipset, put the prototype in romstage.c. - The sandybridge code has not been updated, so the prototype for it goes into chipset_fsp_util.h, next to the prototype for romstage_main_continue. - Correct the return value of baytrail main() from void * to void and remove the unnecessary asmlinkage tag. I'm surprised that this didn't generate a warning... Change-Id: I85ac0797d1e55d2b7ffdca039a52820d7827e704 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7724 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/cougar_canyon2/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c
index c90ece2e56..6b4c1195fe 100644
--- a/src/mainboard/intel/cougar_canyon2/romstage.c
+++ b/src/mainboard/intel/cougar_canyon2/romstage.c
@@ -172,7 +172,6 @@ static void rcba_config(void)
RCBA32(FD) = reg32;
}
-void main(FSP_INFO_HEADER *fsp_info_header); // XXX find a better place dorothy
void main(FSP_INFO_HEADER *fsp_info_header)
{
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)