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authorPatrick Georgi <patrick@georgi-clan.de>2010-11-22 14:14:56 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-11-22 14:14:56 +0000
commit7411eabcdb544205316dfa90e7e708b4b0495074 (patch)
treea22b31164448d14e5415597fa041cd7bd16416d0 /src/mainboard/intel/xe7501devkit
parent394965dd6493943a908a044c5cd3bc3d27e599ec (diff)
Final set of smp_write_bus -> mptable_write_buses changes.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/xe7501devkit')
-rw-r--r--src/mainboard/intel/xe7501devkit/bus.h1
-rw-r--r--src/mainboard/intel/xe7501devkit/mptable.c18
2 files changed, 3 insertions, 16 deletions
diff --git a/src/mainboard/intel/xe7501devkit/bus.h b/src/mainboard/intel/xe7501devkit/bus.h
index 2378ceaea0..286120acf2 100644
--- a/src/mainboard/intel/xe7501devkit/bus.h
+++ b/src/mainboard/intel/xe7501devkit/bus.h
@@ -12,6 +12,5 @@
#define PCI_BUS_P64H2_1_B 5 // P64H2#1 bus B
#define PCI_BUS_P64H2_1_A 6 // P64H2#1 bus A
#define PCI_BUS_ICH3 7 // ICH3-S
-#define SUPERIO_BUS 8 // (arbitrary but unique bus #)
#endif // XE7501DEVKIT_BUS_H_INCLUDED
diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c
index 1a9268061d..9213a2389e 100644
--- a/src/mainboard/intel/xe7501devkit/mptable.c
+++ b/src/mainboard/intel/xe7501devkit/mptable.c
@@ -15,19 +15,7 @@
#define INT_D 3
#define PCI_IRQ(dev, intLine) (((dev)<<2) | intLine)
-static void xe7501devkit_register_buses(struct mp_config_table *mc)
-{
- // Bus ID, Bus Type
- smp_write_bus(mc, PCI_BUS_CHIPSET, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_E7501_HI_B, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_P64H2_2_B, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_P64H2_2_A, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_E7501_HI_D, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_P64H2_1_B, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_P64H2_1_A, BUSTYPE_PCI);
- smp_write_bus(mc, PCI_BUS_ICH3, BUSTYPE_PCI);
- smp_write_bus(mc, SUPERIO_BUS, BUSTYPE_ISA);
-}
+static int bus_isa;
static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
{
@@ -126,7 +114,7 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc)
// TODO: Not sure how to handle BT_INTR# signals from the P64H2s. Do we even need to, in APIC mode?
- mptable_add_isa_interrupts(mc, SUPERIO_BUS, IOAPIC_ICH3, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, IOAPIC_ICH3, 0);
}
static void *smp_write_config_table(void* v)
@@ -139,7 +127,7 @@ static void *smp_write_config_table(void* v)
smp_write_processors(mc);
- xe7501devkit_register_buses(mc);
+ mptable_write_buses(mc, NULL, &bus_isa);
xe7501devkit_register_ioapics(mc);
xe7501devkit_register_interrupts(mc);