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authorMyles Watson <mylesgw@gmail.com>2009-11-06 23:42:26 +0000
committerMyles Watson <mylesgw@gmail.com>2009-11-06 23:42:26 +0000
commitd27c08c2898d1d74765a7799628d1c18369fd671 (patch)
tree7ac357d2b44d833c6efe70d1e691c6611c521e8d /src/mainboard/intel/xe7501devkit
parent547d48ab01049a634dccb16d1847524d5ba93e33 (diff)
Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/xe7501devkit')
-rw-r--r--src/mainboard/intel/xe7501devkit/Config.lb4
-rw-r--r--src/mainboard/intel/xe7501devkit/devicetree.cb4
2 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/intel/xe7501devkit/Config.lb b/src/mainboard/intel/xe7501devkit/Config.lb
index bad246a0df..1f0534c8c0 100644
--- a/src/mainboard/intel/xe7501devkit/Config.lb
+++ b/src/mainboard/intel/xe7501devkit/Config.lb
@@ -127,9 +127,7 @@ chip northbridge/intel/e7501
device pci 1d.1 off end # USB (not populated)
device pci 1d.2 off end # USB (not populated)
device pci 1e.0 on # Hub to PCI bridge
- chip drivers/pci/onboard # VGA ROM
- device pci 0.0 on end
- end
+ device pci 0.0 on end
end
device pci 1f.0 on # LPC bridge
chip superio/smsc/lpc47b272
diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb
index e5873a23af..00ed4eca84 100644
--- a/src/mainboard/intel/xe7501devkit/devicetree.cb
+++ b/src/mainboard/intel/xe7501devkit/devicetree.cb
@@ -25,9 +25,7 @@ chip northbridge/intel/e7501
device pci 1d.1 off end # USB (not populated)
device pci 1d.2 off end # USB (not populated)
device pci 1e.0 on # Hub to PCI bridge
- chip drivers/pci/onboard # VGA ROM
- device pci 0.0 on end
- end
+ device pci 0.0 on end
end
device pci 1f.0 on # LPC bridge
chip superio/smsc/lpc47b272