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authorThejaswani Puta thejaswani.putta@intel.com <thejaswani.putta@intel.com>2021-05-10 13:45:07 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-08-16 14:59:55 +0000
commitb33623355eed2e9ab4092eaa20440af4ffe20da1 (patch)
tree9a5eeb3658f4dacdcdfb5163f7e6aa057d3162d0 /src/mainboard/intel/wtm2
parentae02727c322e162fc690ce5c13fe39cac5c30856 (diff)
mb/intel/adlrvp_m: Enable CR50 TPM support over SPI
Add Kconfig options and enable TPM device in devicetree BUG=None TEST=Booted the image and checked the successful TPM communication in verstage,romstage & ramstage from coreboot logs. Signed-off-by: Thejaswani Puta thejaswani.putta@intel.com <thejaswani.putta@intel.com> Change-Id: Icaedf9f17e35e82c35cbabd6d2938c167e42e9e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54023 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Diffstat (limited to 'src/mainboard/intel/wtm2')
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