diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-05-14 17:03:15 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-04 00:03:17 +0100 |
| commit | 0aa06cbf18145eaf7ecd5a377f09e9d946aa36da (patch) | |
| tree | fd4c9be2fe3dfaa5e7737d8495eae0bc6b124d0c /src/mainboard/intel/wtm2/pei_data.c | |
| parent | ab639bffc7e973245e5f33397138ca8063c4123c (diff) | |
wtm2: Convert to use soc/intel/broadwell
Convert wtm2 board to use the broadwell soc chipset.
BUG=chrome-os-partner:28234
TEST=Build and boot on wtm2 with haswell and broadwell
CQ-DEPEND=CL:201067
CQ-DEPEND=CL:*164226
Original-Change-Id: Ifb0db15cc23a3b66430b32b2ad3f8ab2fb03c4c3
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201070
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit e1073c6e34ab2d436faf46dde5f6b3bf99692866)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I925b91a8de980b1768f03eaee915a7fd91fbdbda
Reviewed-on: http://review.coreboot.org/8001
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/wtm2/pei_data.c')
| -rw-r--r-- | src/mainboard/intel/wtm2/pei_data.c | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/mainboard/intel/wtm2/pei_data.c b/src/mainboard/intel/wtm2/pei_data.c new file mode 100644 index 0000000000..a33dddfe30 --- /dev/null +++ b/src/mainboard/intel/wtm2/pei_data.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2010 coresystems GmbH + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <string.h> +#include <broadwell/gpio.h> +#include <broadwell/pei_data.h> +#include <broadwell/pei_wrapper.h> + +void mainboard_fill_pei_data(struct pei_data *pei_data) +{ + /* One installed DIMM per channel */ + pei_data->dimm_channel0_disabled = 2; + pei_data->dimm_channel1_disabled = 2; + + pei_data->spd_addresses[0] = 0xa2; + pei_data->spd_addresses[2] = 0xa2; + + pei_data_usb2_port(pei_data, 0, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 1, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 2, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 3, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 4, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 5, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 6, 0x40, 1, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + pei_data_usb2_port(pei_data, 7, 0x40, 0, USB_OC_PIN_SKIP, + USB_PORT_FRONT_PANEL); + + pei_data_usb3_port(pei_data, 0, 1, USB_OC_PIN_SKIP, 0); + pei_data_usb3_port(pei_data, 1, 1, USB_OC_PIN_SKIP, 0); + pei_data_usb3_port(pei_data, 2, 0, USB_OC_PIN_SKIP, 0); + pei_data_usb3_port(pei_data, 3, 0, USB_OC_PIN_SKIP, 0); +} |