wtm2: Convert to use soc/intel/broadwell

Convert wtm2 board to use the broadwell soc chipset.

BUG=chrome-os-partner:28234
TEST=Build and boot on wtm2 with haswell and broadwell
CQ-DEPEND=CL:201067
CQ-DEPEND=CL:*164226

Original-Change-Id: Ifb0db15cc23a3b66430b32b2ad3f8ab2fb03c4c3
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201070
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit e1073c6e34ab2d436faf46dde5f6b3bf99692866)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I925b91a8de980b1768f03eaee915a7fd91fbdbda
Reviewed-on: http://review.coreboot.org/8001
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2 files changed, 11 insertions, 85 deletions

diff --git a/src/mainboard/intel/wtm2/acpi/haswell_pci_irqs.asl b/src/mainboard/intel/wtm2/acpi/haswell_pci_irqs.asl
deleted file mode 100644
index d91f9a42fd..0000000000
--- a/src/mainboard/intel/wtm2/acpi/haswell_pci_irqs.asl
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* This is board specific information: IRQ routing for IvyBridge */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
-	If (PICM) {
-		Return (Package() {
-			// Onboard graphics (IGD)	0:2.0
-			Package() { 0x0002ffff, 0, 0, 16 },
-			// High Definition Audio	0:1b.0
-			Package() { 0x001bffff, 0, 0, 22 },
-			// PCIe Root Ports		0:1c.x
-			Package() { 0x001cffff, 0, 0, 17 },
-			Package() { 0x001cffff, 1, 0, 18 },
-			Package() { 0x001cffff, 2, 0, 19 },
-			Package() { 0x001cffff, 3, 0, 20 },
-			// EHCI	  			0:1d.0
-			Package() { 0x001dffff, 0, 0, 19 },
-			// XHCI	  			0:14.0
-			Package() { 0x0014ffff, 0, 0, 16 },
-			// LPC devices			0:1f.0
-			Package() { 0x001fffff, 0, 0, 21 },
-			Package() { 0x001fffff, 1, 0, 22 },
-			Package() { 0x001fffff, 2, 0, 23 },
-			Package() { 0x001fffff, 3, 0, 16 },
-			// Serial IO                    0:15.0
-			Package() { 0x0015ffff, 0, 0, 16 },
-			Package() { 0x0015ffff, 1, 0, 17 },
-			Package() { 0x0015ffff, 2, 0, 18 },
-			Package() { 0x0015ffff, 3, 0, 19 },
-			// SDIO                         0:17.0
-			Package() { 0x0017ffff, 0, 0, 16 },
-		})
-	} Else {
-		Return (Package() {
-			// Onboard graphics (IGD)	0:2.0
-			Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
-			// High Definition Audio	0:1b.0
-			Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
-			// PCIe Root Ports		0:1c.x
-			Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
-			Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
-			Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },
-			Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },
-			// EHCI	#1			0:1d.0
-			Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
-			// EHCI	#2			0:1a.0
-			Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
-			// LPC device			0:1f.0
-			Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
-			Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 },
-			Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 },
-			Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
-		})
-	}
-}
diff --git a/src/mainboard/intel/wtm2/acpi/thermal.asl b/src/mainboard/intel/wtm2/acpi/thermal.asl
index 36310e473e..7a15302f5c 100644
--- a/src/mainboard/intel/wtm2/acpi/thermal.asl
+++ b/src/mainboard/intel/wtm2/acpi/thermal.asl
@@ -18,6 +18,7 @@
  */
 
 // Thermal Zone
+#include "../thermal.h"
 
 Scope (\_TZ)
 {
@@ -68,41 +69,41 @@ Scope (\_TZ)
 
 		Method (_AC0) {
 			If (LLessEqual (\FLVL, 0)) {
-				Return (CTOK (\F0OF))
+				Return (CTOK (FAN0_THRESHOLD_OFF))
 			} Else {
-				Return (CTOK (\F0ON))
+				Return (CTOK (FAN0_THRESHOLD_ON))
 			}
 		}
 
 		Method (_AC1) {
 			If (LLessEqual (\FLVL, 1)) {
-				Return (CTOK (\F1OF))
+				Return (CTOK (FAN1_THRESHOLD_OFF))
 			} Else {
-				Return (CTOK (\F1ON))
+				Return (CTOK (FAN1_THRESHOLD_ON))
 			}
 		}
 
 		Method (_AC2) {
 			If (LLessEqual (\FLVL, 2)) {
-				Return (CTOK (\F2OF))
+				Return (CTOK (FAN2_THRESHOLD_OFF))
 			} Else {
-				Return (CTOK (\F2ON))
+				Return (CTOK (FAN2_THRESHOLD_ON))
 			}
 		}
 
 		Method (_AC3) {
 			If (LLessEqual (\FLVL, 3)) {
-				Return (CTOK (\F3OF))
+				Return (CTOK (FAN3_THRESHOLD_OFF))
 			} Else {
-				Return (CTOK (\F3ON))
+				Return (CTOK (FAN3_THRESHOLD_ON))
 			}
 		}
 
 		Method (_AC4) {
 			If (LLessEqual (\FLVL, 4)) {
-				Return (CTOK (\F4OF))
+				Return (CTOK (FAN4_THRESHOLD_OFF))
 			} Else {
-				Return (CTOK (\F4ON))
+				Return (CTOK (FAN4_THRESHOLD_ON))
 			}
 		}