diff options
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-01-24 10:43:48 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-06 08:02:07 +0000 |
| commit | b2ecc572de7b9c1c0a44f59bc5af22e0bccfc9bb (patch) | |
| tree | 056824a426d5c11c72addce939198514c1e549b1 /src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c | |
| parent | 04571d8dbeb06376564b03759a5e7c22e9ece86a (diff) | |
mb/intel/tglrvp: Enable Audio AIC with Max98373 & ALC5682 on TGL
Add support for Max98373 speaker amp & ALC5682 headset codec
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I013dbc6246b07a501f9bff80c2bca3594e6cc146
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c')
| -rw-r--r-- | src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 8638b806b6..46ed5a20a9 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -50,11 +50,39 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_D18, NONE, PLTRST, NF1), PAD_CFG_NF(GPP_E15, NONE, PLTRST, NF1), PAD_CFG_NF(GPP_E16, NONE, PLTRST, NF1), + + /*Audio */ + PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_SDA */ + PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_SCL */ + PAD_CFG_GPO(GPP_C5, 1, PLTRST), + PAD_CFG_GPI_APIC(GPP_C12, NONE, PLTRST, EDGE_BOTH, INVERT), /* AUDIO JACK IRQ */ + }; /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { -/* ToDo: Fill early gpio configurations for TPM and WWAN */ + + /*Audio */ + PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), /* I2S0_HP_SCLK */ + PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* I2S0_HP_SFRM */ + PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), /* I2S0_HP_TX */ + PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* I2S0_HP_RX */ + + PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1), /* I2S1_SPKR_SCLK */ + PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2), /* I2S1_SPKR_TX */ + PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* I2S1_SPKR_RX */ + PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), /* I2S1_SPKR_SFRM */ + + PAD_CFG_NF(GPP_S0, NONE, DEEP, NF1), /* SNDW0_HP_CLK */ + PAD_CFG_NF(GPP_S1, NONE, DEEP, NF1), /* SNDW0_HP_DATA */ + PAD_CFG_NF(GPP_S2, NONE, DEEP, NF1), /* SNDW1_SPKR_CLK */ + PAD_CFG_NF(GPP_S3, NONE, DEEP, NF1), /* SNDW1_SPKR_DATA */ + + PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2), /* DMIC1_CLK */ + PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2), /* DMIC1_DATA */ + PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), /* DMIC0_CLK */ + PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), /* DMIC0_DATA */ + }; const struct pad_config *variant_gpio_table(size_t *num) |