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| author | Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> | 2023-11-08 09:11:34 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-01-14 02:42:48 +0000 |
| commit | d4b6b81280e70ba59962e9e41cd7cad52e3f369d (patch) | |
| tree | 8ef1c3418fbdd67ac7e6b3b7035afb6258a925d3 /src/mainboard/intel/tglrvp/spd | |
| parent | d7612e97651b75ba2d157ca89bd108c5172ab2c6 (diff) | |
mb/google/geralt: Enable BOE_NV110WUM_L60 panel for Ciri
The MIPI panel BOE_NV110WUM_L60 will be used for Ciri, enable it.
Also remove the `mdelay(10)` after mtk_i2c_bus_init, because MTK
confirms this is not needed. Add mdelay(2) between VDD18 and VSP/VSN
to meet the panel datasheet.
BUG=b:308968270
TEST=Boot to firmware screen
BRANCH=None
Change-Id: I0a04f062f81c543d38716d7ff185b5633c1aa3a9
Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78957
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/tglrvp/spd')
0 files changed, 0 insertions, 0 deletions