summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/tglrvp/ec.c
diff options
context:
space:
mode:
authorJohn Zhao <john.zhao@intel.com>2020-07-25 17:23:53 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-07-29 09:38:38 +0000
commitd05b15e8609397cf3ef7ef5e6dab942cc2678ee2 (patch)
tree7e8b56f29d426490c8caeab43e6735bd78df34c6 /src/mainboard/intel/tglrvp/ec.c
parentc379d46c1c49a2f9f28bdcbb42b94976dbb24a72 (diff)
mb/intel/tglrvp: Add support for USB Type-C connector device properties
This change updates TGLRVP configuration to have USB Type-C connector device properties filled into ACPI SSDT. TEST=Built and booted to kernel on tglrvp boards. Verified the USBC scope under LPCB.EC0.CREC with required connector device properties. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: Ifd4c59afb3b8a222598fd4ff36d72c4b877bdad2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43893 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/tglrvp/ec.c')
-rw-r--r--src/mainboard/intel/tglrvp/ec.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mainboard/intel/tglrvp/ec.c b/src/mainboard/intel/tglrvp/ec.c
new file mode 100644
index 0000000000..14760017ef
--- /dev/null
+++ b/src/mainboard/intel/tglrvp/ec.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <ec/ec.h>
+#include <ec/google/chromeec/ec.h>
+#include <baseboard/ec.h>
+
+void mainboard_ec_init(void)
+{
+ const struct google_chromeec_event_info info = {
+ .log_events = MAINBOARD_EC_LOG_EVENTS,
+ .sci_events = MAINBOARD_EC_SCI_EVENTS,
+ .s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS,
+ .s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS,
+ .s0ix_wake_events = MAINBOARD_EC_S0IX_WAKE_EVENTS,
+ };
+
+ google_chromeec_events_init(&info, acpi_is_wakeup_s3());
+}