diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-12-02 15:30:10 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-08-16 17:55:02 +0000 |
| commit | 027f86e6af023b338a0f1d8a999a8f33eeacb010 (patch) | |
| tree | 691450089ec0116cba1ec04b1b73ca3dea39aaf5 /src/mainboard/intel/strago | |
| parent | 4a9de553c5307595f396b47aaa108bf1dc34638d (diff) | |
ACPI: Add usb_charge_mode_from_gnvs()
Early Chromebook generations stored the information about
USB port power control for S3/S5 sleepstates in GNVS, although
the configuration is static.
Reduce code duplication and react to ACPI S4 as if it was ACPI
S5 request.
Change-Id: I7e6f37a023b0e9317dcf0355dfa70e28d51cdad9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/intel/strago')
| -rw-r--r-- | src/mainboard/intel/strago/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/strago/acpi_tables.c | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/strago/smihandler.c | 17 |
3 files changed, 3 insertions, 19 deletions
diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig index b15984f448..5cd7880167 100644 --- a/src/mainboard/intel/strago/Kconfig +++ b/src/mainboard/intel/strago/Kconfig @@ -2,6 +2,7 @@ if BOARD_INTEL_STRAGO config BOARD_SPECIFIC_OPTIONS def_bool y + select ACPI_GNVS_USB_CHARGECTL select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID diff --git a/src/mainboard/intel/strago/acpi_tables.c b/src/mainboard/intel/strago/acpi_tables.c index 279a5c1952..5a705f40be 100644 --- a/src/mainboard/intel/strago/acpi_tables.c +++ b/src/mainboard/intel/strago/acpi_tables.c @@ -11,10 +11,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) gnvs->s3u0 = 1; gnvs->s3u1 = 1; - /* Disable USB ports in S5 */ - gnvs->s5u0 = 0; - gnvs->s5u1 = 0; - /* PMIC is configured in I2C1, hidden it from OS */ struct device_nvs *dev_nvs = acpi_get_device_nvs(); dev_nvs->lpss_en[LPSS_NVS_I2C2] = 0; diff --git a/src/mainboard/intel/strago/smihandler.c b/src/mainboard/intel/strago/smihandler.c index a625b62a6a..6d29df8437 100644 --- a/src/mainboard/intel/strago/smihandler.c +++ b/src/mainboard/intel/strago/smihandler.c @@ -8,7 +8,6 @@ #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/smm.h> -#include <soc/nvs.h> #include <soc/pm.h> #include <soc/gpio.h> @@ -30,28 +29,16 @@ void mainboard_smi_gpi(uint32_t alt_gpio_smi) void mainboard_smi_sleep(uint8_t slp_typ) { /* Disable USB charging if required */ + chromeec_set_usb_charge_mode(slp_typ); + switch (slp_typ) { case ACPI_S3: - if (gnvs->s3u0 == 0) - google_chromeec_set_usb_charge_mode( - 0, USB_CHARGE_MODE_DISABLED); - if (gnvs->s3u1 == 0) - google_chromeec_set_usb_charge_mode( - 1, USB_CHARGE_MODE_DISABLED); - /* Enable wake events */ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); /* Enable wake pin in GPE block. */ enable_gpe(WAKE_GPIO_EN); break; case ACPI_S5: - if (gnvs->s5u0 == 0) - google_chromeec_set_usb_charge_mode( - 0, USB_CHARGE_MODE_DISABLED); - if (gnvs->s5u1 == 0) - google_chromeec_set_usb_charge_mode( - 1, USB_CHARGE_MODE_DISABLED); - /* Enable wake events */ google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); break; |