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authorJagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>2015-07-16 17:56:18 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-23 16:39:15 +0200
commite95b7d80a2c3dc22280b9b1e8f22da5043e8b552 (patch)
treebd71ddffe72b3db1756b301463f91830e0c5f193 /src/mainboard/intel/strago/irqroute.h
parent0a754021cf7eecf385bc6e9885ce57c5b9a33c0d (diff)
cyan/strago: disable Ambient Light Sensor device
No devices are connected to i2c4 bus on both strago and cyan board. Hence disabling the ALS platform data. This will fix the i2c4 timeout issue and also help in boot time optimization. Removed unused macros. BUG=None BRANCH=chrome-os-partner:41934 TEST=After booting to kernel, i2c4 timeout error message should not appear in dmesg. Change-Id: Ib7ab4c95b0830a8d4e53c6c0ee919649ad1ed354 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3c52b64037b46016fe01f1d55c4c58f7684eb778 Original-Change-Id: Ia7acdcef67a2f2837866f56aa0426a02ee05db46 Original-Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/283608 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11005 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/strago/irqroute.h')
-rw-r--r--src/mainboard/intel/strago/irqroute.h15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/mainboard/intel/strago/irqroute.h b/src/mainboard/intel/strago/irqroute.h
index c670beebda..e66c87f841 100644
--- a/src/mainboard/intel/strago/irqroute.h
+++ b/src/mainboard/intel/strago/irqroute.h
@@ -47,18 +47,3 @@
PIRQ_PIC(G, DISABLE), \
PIRQ_PIC(H, DISABLE)
-/* CORE bank DIRQs - up to 16 supported */
-#define TPAD_IRQ_OFFSET 0
-#define TOUCH_IRQ_OFFSET 1
-#define I8042_IRQ_OFFSET 2
-#define ALS_IRQ_OFFSET 3
-/* Corresponding SCORE GPIO pins */
-#define TPAD_IRQ_GPIO 55
-#define TOUCH_IRQ_GPIO 72
-#define I8042_IRQ_GPIO 101
-#define ALS_IRQ_GPIO 70
-
-/* SUS bank DIRQs - up to 16 supported */
-#define CODEC_IRQ_OFFSET 0
-/* Corresponding SUS GPIO pins */
-#define CODEC_IRQ_GPIO 9