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| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2021-11-01 16:13:55 +0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-09 20:21:39 +0000 |
| commit | d0cef2ac6b0da7e7415bfeb154f0b6e2cfef51a0 (patch) | |
| tree | f0ef871d276c1d331256772b1aa8a8c7d650496a /src/mainboard/intel/strago/dsdt.asl | |
| parent | 6d27905e039fcf8671f6b761665cb35fb148548f (diff) | |
soc/intel/alderlake: Enable Intel FIVR RFI settings
Add RFI UPD settings to mitigate RFI noise issues and exporting
these UPDs to override via board devicetree.
BUG=b:200886627
TEST=build
Change-Id: I37bfef295fcd886d4f01abd40f9467a0791e9e34
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/strago/dsdt.asl')
0 files changed, 0 insertions, 0 deletions