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authorMarc Jones <marc.jones@se-eng.com>2015-09-15 23:05:00 -0600
committerMartin Roth <martinroth@google.com>2015-11-10 00:25:14 +0100
commit3b0a626edc9d1a45324fd8e77b10e4e49155bb8f (patch)
tree75a7a0fc8084031da63f3aa3e37448ecb7d5cb54 /src/mainboard/intel/stargo2/acpi/ec.asl
parent2d72345f80266555aa3c358d0b7bcda083687b5c (diff)
mainboard/intel: Add Stargo2
The Intel Stargo2 is a communications device reference design. This mainboard uses the Sandy/Ivy Bridge and is paired with the i89xx southbridge. The FSP package is available from Intel: https://intel.com/fsp. Change-Id: I75c527f0eb0de1ee6ac13d8d276d7cf23b5b120c Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/12170 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/stargo2/acpi/ec.asl')
-rw-r--r--src/mainboard/intel/stargo2/acpi/ec.asl7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/intel/stargo2/acpi/ec.asl b/src/mainboard/intel/stargo2/acpi/ec.asl
new file mode 100644
index 0000000000..ed0842999f
--- /dev/null
+++ b/src/mainboard/intel/stargo2/acpi/ec.asl
@@ -0,0 +1,7 @@
+/*
+ * ec.asl
+ *
+ * This file is included by lpc.asl in the southbridge directory.
+ * It is intended to be used to include any embedded controller
+ * specific ASL.
+ */ \ No newline at end of file