mainboard/intel: Add Skylake based RVP3 board

Initial files to support the Intel Skylake RVP3
Matches chromium tree at 927026db

This board uses the Skylake FSP 1.1 image and does not build without the
FspUpdVpd.h file.

BRANCH=none
BUG=None
TEST=Build and run on sklrvp

Change-Id: I5e7fff8f62a737e627e25c1e03e343d6167041ea
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10343
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

4 files changed, 294 insertions, 0 deletions

diff --git a/src/mainboard/intel/sklrvp/acpi/chromeos.asl b/src/mainboard/intel/sklrvp/acpi/chromeos.asl
new file mode 100644
index 0000000000..c6665f9452
--- /dev/null
+++ b/src/mainboard/intel/sklrvp/acpi/chromeos.asl
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+Name (OIPG, Package() {
+	Package () { 0x0001, 0, 0xFFFFFFFF, "INT3437:00" }, // no recovery button
+	Package () { 0x0003, 1, 16, "INT3437:00" }, // firmware write protect
+})
diff --git a/src/mainboard/intel/sklrvp/acpi/ec.asl b/src/mainboard/intel/sklrvp/acpi/ec.asl
new file mode 100644
index 0000000000..9cfe6a6388
--- /dev/null
+++ b/src/mainboard/intel/sklrvp/acpi/ec.asl
@@ -0,0 +1,18 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
diff --git a/src/mainboard/intel/sklrvp/acpi/mainboard.asl b/src/mainboard/intel/sklrvp/acpi/mainboard.asl
new file mode 100644
index 0000000000..d771f627eb
--- /dev/null
+++ b/src/mainboard/intel/sklrvp/acpi/mainboard.asl
@@ -0,0 +1,234 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+/* REAKTEK Audio Jack Interrupt */
+#define GPIO_SKL_LP_GPP_E22	0x02040016
+
+#include <mainboard/intel/sklrvp/onboard.h>
+
+/*
+ * LPC Trusted Platform Module
+ */
+Scope (\_SB.PCI0.LPCB)
+{
+	#include <drivers/pc80/tpm/acpi/tpm.asl>
+}
+
+/*
+ * WLAN connected to Root Port 3, becomes Root Port 1 after coalesce
+ */
+Scope (\_SB.PCI0.RP01)
+{
+	Device (WLAN)
+	{
+		Name (_ADR, 0x00000000)
+
+		/* GPIO10 is PCH_WLAN_WAKE_L */
+		Name (GPIO, 10)
+
+		Name (_PRW, Package() { GPIO, 3 })
+
+	}
+}
+
+Scope (\_SB.PCI0.I2C0)
+{
+	Device (ETPA)
+	{
+		Name (_HID, "SYN2393")
+		Name (_CID, "PNP0C50")
+		Name (_DDN, "Synaptic Touchpad")
+		Name (_UID, 3)
+		Name (ISTP, 1) /* Touchpad */
+
+		/* Fetch HidDescriptorAddress, Register offset in the
+		 * I2C device at which the HID descriptor can be read
+		 */
+		Method (_DSM, 4, NotSerialized)
+		{
+			If (LEqual (Arg0, ToUUID (
+				"3cdff6f7-4267-4555-ad05-b30a3d8938de")))
+			{
+				If (LEqual (Arg2, Zero))
+				{
+					If (LEqual (Arg1, One))
+					{
+						Return (Buffer (One)
+						{
+							0x03
+						})
+					}
+					Else
+					{
+						Return (Buffer (One)
+						{
+							0x00
+						})
+					}
+				}
+				If (LEqual (Arg2, One))
+				{
+					Return (0x20)
+				}
+			}
+			Else
+			{
+				Return (Buffer (One)
+				{
+					0x00
+				})
+			}
+
+			Return (Zero)
+		}
+
+		Name (_CRS, ResourceTemplate()
+		{
+			I2cSerialBus (
+				BOARD_TOUCHPAD_I2C_ADDR,	/* SlaveAddress */
+				ControllerInitiated,	/* SlaveMode */
+				400000,			/* ConnectionSpeed */
+				AddressingMode7Bit,	/* AddressingMode */
+				"\\_SB.PCI0.I2C0",	/* ResourceSource */
+			)
+			Interrupt (ResourceConsumer, Level, ActiveLow)
+				{ BOARD_TOUCHPAD_IRQ }
+		})
+	}
+
+	//-----------------------------------
+	//  HD Audio I2S Codec device
+	//  Realtek ALC286S       (I2SC = 2)
+	//-----------------------------------
+	Device (HDAC)
+	{
+		Name (_HID, "INT343A")
+		Name (_CID, "INT343A")
+		Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec")
+		Name (_UID, 1)
+
+		Method (_CRS, 0, NotSerialized)  // _CRS: Current Resource Settings
+		{
+			/* update Audio codec slave address in runtime */
+			Name (RBUF, ResourceTemplate ()
+			{
+				I2cSerialBus (0x1C, ControllerInitiated, 400000,
+					AddressingMode7Bit, "\\_SB.PCI0.I2C0",
+					0x00, ResourceConsumer, ,)
+			})
+
+			/* update interrupt number in runtime */
+			Name (SBFI, ResourceTemplate ()
+			{
+				Interrupt (ResourceConsumer, Level, ActiveLow,
+						ExclusiveAndWake, ,, _Y22)
+				{
+					0x00000000,
+				}
+			})
+
+			/* _INT: Interrupts */
+			CreateDWordField (SBFI, _Y22._INT, INT2)
+
+			Store (INUM (GPIO_SKL_LP_GPP_E22), INT2)
+
+			Return (ConcatenateResTemplate (RBUF, SBFI))
+		}
+
+		Method (_STA, 0, NotSerialized)
+		{
+			Return (0xF)	/* I2S Codec Enabled */
+		}
+	}
+}
+
+Scope (\_SB.PCI0.I2C1)
+{
+	Device (ATSA)
+	{
+		Name (_HID, "ATML3432")
+		Name (_DDN, "Atmel Touchscreen")
+		Name (_UID, 5)
+		Name (_S0W, 4)
+		Name (ISTP, 0) /* TouchScreen */
+		Name (_CID, "PNP0C50")
+
+		/* Fetch HidDescriptorAddress, Register offset in the
+		 * I2C device at which the HID descriptor can be read
+		 */
+		Method (_DSM, 4, NotSerialized)
+		{
+			If (LEqual (Arg0, ToUUID (
+				"3cdff6f7-4267-4555-ad05-b30a3d8938de")))
+			{
+				If (LEqual (Arg2, Zero))
+				{
+					If (LEqual (Arg1, One))
+					{
+						Return (Buffer (One)
+						{
+							0x03
+						})
+					}
+					Else
+					{
+						Return (Buffer (One)
+						{
+							0x00
+						})
+					}
+				}
+
+				If (LEqual (Arg2, One))
+				{
+					Return (Zero)
+				}
+			}
+			Else
+			{
+				Return (Buffer (One)
+				{
+					0x00
+				})
+			}
+
+			Return (Zero)
+		}
+
+		Name (_CRS, ResourceTemplate()
+		{
+			I2cSerialBus (
+				BOARD_TOUCHSCREEN_I2C_ADDR,	// SlaveAddress
+				ControllerInitiated,		// SlaveMode
+				400000,				// ConnectionSpeed
+				AddressingMode7Bit,		// AddressingMode
+				"\\_SB.PCI0.I2C1",		// ResourceSource
+			)
+
+			Interrupt (ResourceConsumer, Level, ActiveLow)
+				{ BOARD_TOUCHSCREEN_IRQ }
+		})
+
+		Method (_STA, 0, NotSerialized)
+		{
+			Return (0xF)
+		}
+	}
+}
diff --git a/src/mainboard/intel/sklrvp/acpi/superio.asl b/src/mainboard/intel/sklrvp/acpi/superio.asl
new file mode 100644
index 0000000000..9cfe6a6388
--- /dev/null
+++ b/src/mainboard/intel/sklrvp/acpi/superio.asl
@@ -0,0 +1,18 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */