diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-05-12 18:25:25 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-07-17 20:19:29 +0200 |
| commit | 01464a69b8ceaee0e145fcbe61a99e0a077a2332 (patch) | |
| tree | 9c7796ce7020a2c0e719442460cd135471d36261 /src/mainboard/intel/sklrvp/Kconfig | |
| parent | 5cb9ddad3e8d487945c4a1e4b82575369b08be52 (diff) | |
mainboard/intel: Add Skylake based RVP3 board
Initial files to support the Intel Skylake RVP3
Matches chromium tree at 927026db
This board uses the Skylake FSP 1.1 image and does not build without the
FspUpdVpd.h file.
BRANCH=none
BUG=None
TEST=Build and run on sklrvp
Change-Id: I5e7fff8f62a737e627e25c1e03e343d6167041ea
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10343
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/sklrvp/Kconfig')
| -rw-r--r-- | src/mainboard/intel/sklrvp/Kconfig | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/intel/sklrvp/Kconfig b/src/mainboard/intel/sklrvp/Kconfig new file mode 100644 index 0000000000..4c764c0804 --- /dev/null +++ b/src/mainboard/intel/sklrvp/Kconfig @@ -0,0 +1,52 @@ +if BOARD_INTEL_SKLRVP + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select BOARD_ROMSIZE_KB_16384 + select CACHE_ROM + select CHROMEOS + select CHROMEOS_RAMOOPS_DYNAMIC + select CHROMEOS_VBNV_CMOS + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_SMI_HANDLER + select MAINBOARD_HAS_CHROMEOS + select MARK_GRAPHICS_MEM_WRCOMB + select MMCONF_SUPPORT + select MONOTONIC_TIMER_MSR + select INTEL_PCH_UART_CONSOLE + select SOC_INTEL_SKYLAKE + select VBOOT_DYNAMIC_WORK_BUFFER + select VIRTUAL_DEV_SWITCH + select LID_SWITCH + +config IRQ_SLOT_COUNT + int + default 18 + +config BOOT_MEDIA_SPI_BUS + int + default 0 + +config INTEL_PCH_UART_CONSOLE_NUMBER + hex + default 2 + +config MAINBOARD_DIR + string + default "intel/sklrvp" + +config MAINBOARD_PART_NUMBER + string + default "Skylake RVP" + +config MAX_CPUS + int + default 8 + +config VBOOT_RAMSTAGE_INDEX + hex + default 0x3 + +endif |