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author | Kevin Chiu <kevin.chiu.17802@gmail.com> | 2021-02-04 20:09:51 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-06 09:08:44 +0000 |
commit | 72463720a2aa831c703e2536843f5f58ed32091d (patch) | |
tree | 5a7c92996b45e09640d0a0da051c56d9eb666115 /src/mainboard/intel/shadowmountain | |
parent | 26b0bad671dd4b0248a7f5e041cfe831d1506e85 (diff) |
mb/google/zork: Adjust Dirinboz H1 I2C CLK
Adjust H1 I2C CLK:
404kHz -> 391 kHz
BUG=b:178656936
BRANCH=master
TEST=1. emerge-zork coreboot chromeos-bootimage
2. power on proto board successfully
3. measure i2c freq by scope is close to 400kHz
Change-Id: I9067db9fc7a4d6aa2ce33b86ba6a611dfd5d7838
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/mainboard/intel/shadowmountain')
0 files changed, 0 insertions, 0 deletions