mb/intel/shadowmountain: Add bootblock and verstage code

This patch includes the bootblock and verstage changes for
shadowmountain board.

BUG=b:175808146
TEST= Build and boot shadowmountain board till early romstage.

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I5f805baf42203306ff10e91a258d9117dd986c4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/src/mainboard/intel/shadowmountain/bootblock.c b/src/mainboard/intel/shadowmountain/bootblock.c
new file mode 100644
index 0000000000..98f58bc6a1
--- /dev/null
+++ b/src/mainboard/intel/shadowmountain/bootblock.c
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <bootblock_common.h>
+
+void bootblock_mainboard_early_init(void)
+{
+	variant_configure_early_gpio_pads();
+}