diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2022-03-04 09:24:48 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-16 16:56:50 +0000 |
| commit | 073da0cbae869389a2fd07a18feaea0c6c7d42e1 (patch) | |
| tree | 2dbc2e10cb24d2c81b6eefe24a3f8606a028f8af /src/mainboard/intel/saddlebrook | |
| parent | 92bd71ff741f61787fbd05155c03c56e5ffaca10 (diff) | |
soc/intel/common: Retry MEI CSE DISABLE command
As per ME BWG, the patch retries MEI CSE DISABLE command if CSE doesn't
respond or sends the garbled response. It retries the command
additionally 2 more times.
TEST=build and boot the Brya board
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Id38a172d670a0cd44643744f27b85ca7e368ccdb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/saddlebrook')
0 files changed, 0 insertions, 0 deletions