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| author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 04:59:03 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2024-06-26 11:44:08 +0000 |
| commit | df7de392ef5f8e1654df96a1a050820eb3779012 (patch) | |
| tree | 341c3b10cc90f3831a9aadbb90d50d4edb0b47f4 /src/mainboard/intel/saddlebrook | |
| parent | dcddc53fde2d559beef998d3c17e9b7a227e3665 (diff) | |
skl mainboards/dt: Move SATA related settings into SATA device scope
Change-Id: I50706d7a077767d2295d6d5f209c30109d607277
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83179
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/saddlebrook')
| -rw-r--r-- | src/mainboard/intel/saddlebrook/devicetree.cb | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 067cb599fb..73df651458 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -130,17 +130,6 @@ chip soc/intel/skylake # Must leave UART0 enabled or SD/eMMC will not work as PCI - register "SataSalpSupport" = "1" - register "SataPortsEnable" = "{ - [0] = 1, - [1] = 1, - [2] = 1, - [3] = 1, - [4] = 1, - [5] = 1, - [6] = 1, - [7] = 1, - }" register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, @@ -205,7 +194,19 @@ chip soc/intel/skylake device ref i2c2 on end device ref i2c3 on end device ref heci1 on end - device ref sata on end + device ref sata on + register "SataSalpSupport" = "1" + register "SataPortsEnable" = "{ + [0] = 1, + [1] = 1, + [2] = 1, + [3] = 1, + [4] = 1, + [5] = 1, + [6] = 1, + [7] = 1, + }" + end device ref uart2 on end device ref i2c5 on end device ref i2c4 on end |