diff options
author | Nico Huber <nico.h@gmx.de> | 2019-05-04 17:06:06 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-07 15:57:15 +0000 |
commit | f98f8ebb8cb43f17c8d244f2c4cce2e257355e37 (patch) | |
tree | 1bef74f84cfbeebe4c18c1946aa02e48b916e341 /src/mainboard/intel/saddlebrook/romstage.c | |
parent | 9b5b9e46b9342500a411514e62032fa3edb565a2 (diff) |
mb/intel/saddlebrook: Refactor to get rid of `pei_data`
The SoC specific `struct pei_data` was filled with values that were
later only consumed by the mainboard code again. Avoid jumping through
this hoop and fill FSP UPDs directly.
Change-Id: I399dd89f85ccea43fdf90bd895e71324f4b409cc
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/intel/saddlebrook/romstage.c')
-rw-r--r-- | src/mainboard/intel/saddlebrook/romstage.c | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/src/mainboard/intel/saddlebrook/romstage.c b/src/mainboard/intel/saddlebrook/romstage.c index d19629cf9e..48d39db309 100644 --- a/src/mainboard/intel/saddlebrook/romstage.c +++ b/src/mainboard/intel/saddlebrook/romstage.c @@ -19,8 +19,6 @@ #include <fsp/api.h> #include <string.h> #include <soc/gpio.h> -#include <soc/pei_data.h> -#include <soc/pei_wrapper.h> #include <soc/pm.h> #include <soc/romstage.h> #include "spd/spd.h" @@ -38,8 +36,6 @@ void car_mainboard_pre_console_init(void) void mainboard_romstage_entry(struct romstage_params *params) { post_code(0x31); - /* Fill out PEI DATA */ - mainboard_fill_pei_data(params->pei_data); romstage_common(params); } @@ -67,18 +63,10 @@ void mainboard_memory_init_params( * should be set in the FSP flash image and should not need to be * changed. */ - memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0], - sizeof(params->pei_data->dq_map[0])); - memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1], - sizeof(params->pei_data->dq_map[1])); - memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0], - sizeof(params->pei_data->dqs_map[0])); - memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1], - sizeof(params->pei_data->dqs_map[1])); - memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor, - sizeof(params->pei_data->RcompResistor)); - memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget, - sizeof(params->pei_data->RcompTarget)); + mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0); + mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0); + mainboard_fill_rcomp_res_data(&memory_params->RcompResistor); + mainboard_fill_rcomp_strength_data(&memory_params->RcompTarget); /* update spd length*/ memory_params->MemorySpdDataLen = blk.len; |