diff options
| author | Teo Boon Tiong <boon.tiong.teo@intel.com> | 2017-09-07 00:48:55 +0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2017-12-19 15:36:48 +0000 |
| commit | 4dee7b528d3d85ffcca9b7f1fe02959e4113e106 (patch) | |
| tree | aa749395e82efd059383c3b5f27359afa297c72e /src/mainboard/intel/saddlebrook/board_info.txt | |
| parent | 08bea22c246fe4ad181a8992f86100e9249404ae (diff) | |
mainboard/intel/saddlebrook: add support for Saddle Brook
Add initial files to support the Saddle Brook board. This board uses the
Skylake FSP 1.1 image and does not build without the FspUpdVpd.h file.
Most of the code has been taken carried over from kunimitsu with changes
done for Saddle Brook.
Saddle Brook is a reference board for Skylake SOC and has DDR4.
TEST=Build with uefi payload and boot to Linux 4.9 on CRB successfully.
Change-Id: Ie221eb58e8ab8ff15e9ef19c1d145a5eb2921b4e
Signed-off-by: Anuj Mittal <anujx.mittal@intel.com>
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/21436
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/intel/saddlebrook/board_info.txt')
| -rw-r--r-- | src/mainboard/intel/saddlebrook/board_info.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/saddlebrook/board_info.txt b/src/mainboard/intel/saddlebrook/board_info.txt new file mode 100644 index 0000000000..d3295d9341 --- /dev/null +++ b/src/mainboard/intel/saddlebrook/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Intel +Board name: Saddle Brook Skylake Reference Board +Category: eval +ROM protocol: SPI +ROM socketed: n +Flashrom support: y |