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authorSean Rhodes <sean@starlabs.systems>2024-04-15 10:20:41 +0100
committerMartin L Roth <gaumless@gmail.com>2024-10-07 20:24:53 +0000
commit7d904cb7c64df0f156dc7f79cbfd4ffc57deeb29 (patch)
treea86f51a90bf39b0cf032cb5fcf4efdf6e53b1d64 /src/mainboard/intel/mtlrvp/dsdt.asl
parentb6974ab13deccb89d8fa749a37ad97fc951eddc8 (diff)
soc/intel/alderlake: Hook up PCIe Power Management to option API
Hook up PCIEXP_CLK_PM, PCIEXP_ASPM and PCIEXP_L1_SUBSTATE to the option API. This provides users an easy way to disable power saving options that can limit performance. Change-Id: I2b06a7c734a4fd4073e86c668742ee35e1d79956 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81906 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/mtlrvp/dsdt.asl')
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