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| author | Martin Roth <gaumless@gmail.com> | 2014-05-21 14:23:12 -0600 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-07-30 19:01:20 +0200 |
| commit | 90957f885294527ff9342f56d2e07c5a23fb1ce2 (patch) | |
| tree | d968870ab97604d3582267fabf546af915a21455 /src/mainboard/intel/mohonpeak/Kconfig | |
| parent | 829c41da6cd9d8e9c9244c8c9ea2b181ea5ab930 (diff) | |
mainboard/intel: Add Mohon Peak CRB for Intel's atom c2000
Add the Mohon Peak CRB.
Updates to come.
Change-Id: I0a8496d502bab905c6f35eff9fcd7eda266831ed
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/6371
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/intel/mohonpeak/Kconfig')
| -rw-r--r-- | src/mainboard/intel/mohonpeak/Kconfig | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig new file mode 100644 index 0000000000..4632c7f9d3 --- /dev/null +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -0,0 +1,99 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +if BOARD_INTEL_MOHONPEAK + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_FSP_RANGELEY + select SOUTHBRIDGE_INTEL_FSP_RANGELEY + select BOARD_ROMSIZE_KB_2048 #actual chip is 8MB + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select MMCONF_SUPPORT + select POST_IO + select DEFAULT_POST_DEVICE_LPC + select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT + +config MAINBOARD_DIR + string + default intel/mohonpeak + +config INCLUDE_ME + bool + default n + +config LOCK_MANAGEMENT_ENGINE + bool + default n + +config MAINBOARD_PART_NUMBER + string + default "Mohon Peak CRB" + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 16 + +config CACHE_ROM_SIZE_OVERRIDE + hex + default 0x800000 + +config FSP_FILE + string + default "../intel/fsp/rangeley/FvFsp.bin" + +config CBFS_SIZE + hex + default 0x00200000 + +config DRIVERS_PS2_KEYBOARD + bool + default n + +config CONSOLE_POST + bool + default y + +config ENABLE_FSP_FAST_BOOT + bool + depends on HAVE_FSP_BIN + default y + +config VIRTUAL_ROM_SIZE + hex + depends on ENABLE_FSP_FAST_BOOT + default 0x400000 + +config FSP_PACKAGE_DEFAULT + bool "Configure defaults for the Intel FSP package" + default n + +config UART_FOR_CONSOLE + int + default 1 + help + The Mohon Peak board uses com2 (2f8) for the serial console. + +endif # BOARD_INTEL_MOHONPEAK |