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authorMartin Roth <gaumless@gmail.com>2017-04-02 22:25:28 -0600
committerMartin Roth <martinroth@google.com>2017-04-07 21:41:19 +0200
commit9931f66581f18adcbb2f1efd5cec7119e50a0291 (patch)
tree6a866b2f18d922c9b1e40ebe8d581c0ce4b1c966 /src/mainboard/intel/minnowmax/irqroute.h
parent46cf5c29b3f08c0ddb1893b5c87907304994fcd5 (diff)
mainboard/intel: Fix checkpatch errors in minnowmax
This fixes the following issues, with no functional changes: ERROR:POINTER_LOCATION: "foo * bar" should be "foo *bar" ERROR:SPACING: space required after that ',' (ctx:VxV) WARNING:LONG_LINE_COMMENT: line over 80 characters WARNING:SPACE_BEFORE_TAB: please, no space before tabs ERROR:FUNCTION_WITHOUT_ARGS: Bad function definition ERROR:SPACING: space prohibited before that close parenthesis ')' WARNING:RETURN_VOID: void function return statements are not generally useful 2 unfixed issues: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses Verified that the binary was the same before and after the changes. Change-Id: Ie9afb50e268f4140872e39fe8bede231a43d5cc6 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/19078 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: York Yang <york.yang@intel.com>
Diffstat (limited to 'src/mainboard/intel/minnowmax/irqroute.h')
-rw-r--r--src/mainboard/intel/minnowmax/irqroute.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/src/mainboard/intel/minnowmax/irqroute.h b/src/mainboard/intel/minnowmax/irqroute.h
index 0b194aa10d..20281b7e3f 100644
--- a/src/mainboard/intel/minnowmax/irqroute.h
+++ b/src/mainboard/intel/minnowmax/irqroute.h
@@ -21,25 +21,25 @@
#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
/*
- *IR02h GFX INT(A) - PIRQ A
- *IR10h EMMC INT(ABCD) - PIRQ DEFG
- *IR11h SDIO INT(A) - PIRQ B
- *IR12h SD INT(A) - PIRQ C
- *IR13h SATA INT(A) - PIRQ D
- *IR14h XHCI INT(A) - PIRQ E
- *IR15h LP Audio INT(A) - PIRQ F
- *IR17h MMC INT(A) - PIRQ F
- *IR18h SIO INT(ABCD) - PIRQ BADC
- *IR1Ah TXE INT(A) - PIRQ F
- *IR1Bh HD Audio INT(A) - PIRQ G
- *IR1Ch PCIe INT(ABCD) - PIRQ EFGH
- *IR1Dh EHCI INT(A) - PIRQ D
- *IR1Eh SIO INT(ABCD) - PIRQ BDEF
- *IR1Fh LPC INT(ABCD) - PIRQ HGBC
+ *IR02h GFX INT(A) - PIRQ A
+ *IR10h EMMC INT(ABCD) - PIRQ DEFG
+ *IR11h SDIO INT(A) - PIRQ B
+ *IR12h SD INT(A) - PIRQ C
+ *IR13h SATA INT(A) - PIRQ D
+ *IR14h XHCI INT(A) - PIRQ E
+ *IR15h LP Audio INT(A) - PIRQ F
+ *IR17h MMC INT(A) - PIRQ F
+ *IR18h SIO INT(ABCD) - PIRQ BADC
+ *IR1Ah TXE INT(A) - PIRQ F
+ *IR1Bh HD Audio INT(A) - PIRQ G
+ *IR1Ch PCIe INT(ABCD) - PIRQ EFGH
+ *IR1Dh EHCI INT(A) - PIRQ D
+ *IR1Eh SIO INT(ABCD) - PIRQ BDEF
+ *IR1Fh LPC INT(ABCD) - PIRQ HGBC
*/
/* PCIe bridge routing */
-#define BRIDGE1_DEV PCIE_DEV
+#define BRIDGE1_DEV PCIE_DEV
/* PCI bridge IRQs need to be updated in both tables and need to match */
#define PCIE_BRIDGE_IRQ_ROUTES \