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authorMartin Roth <martin.roth@se-eng.com>2014-07-28 14:22:32 -0600
committerMartin Roth <gaumless@gmail.com>2014-08-11 19:01:25 +0200
commite6df041b8bf8e37debc0d6a871080b64eea7a372 (patch)
tree3b97b176f7f9fc15a82d901274bac7d0b0130855 /src/mainboard/intel/minnowmax/irqroute.h
parent83da50173ce0547320f029bf3ff46df62c084aac (diff)
mainboard/intel/minnowmax: Add MinnowMax mainboard
MinnowMax board using Intel's Bay Trail FSP Working: - Booting from SATA / USB / (USB3 with latest SeaBIOS) Not working: - Boot from SD - S3 Suspend / Resume ***** To configure the FSP ***** Download the Bay Trail FSP and the binary config tool: Modify the standard Bay Trail FSP: run the bct tool with the command line options: bct --bin <Bay Trail FSP Binary> \ --absf src/vendorcode/intel/fsp/baytrail/absf/minnowmax_Xgb.absf \ --bout <path to save the updated FSP to> Here are the required changes for modifying the FSP manually: Enable Memory Down: Enabled DRAM Speed: 1066 MHz DIMM_DWidth: x16 DIMM_Density: 4 Gbit (2GB Minnow Max) / 2 Gbit (1GB Minnow Max) tCL: 7 tRP_tRCD: 7 tWR: 8 tRRD: 6 tRTP: 4 tFAW: 27 Other FSP values can remain the same. ***** To configure the vbios ***** The vbios is in the Bay Trail FSP package. Download Intel's "Binary Modification Program" (BMP) Use it to disable all ports except HDMI on port B. Change-Id: I00d90e0d838d70c9d25c69f5115d0c9d6d19855c Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/6429 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/intel/minnowmax/irqroute.h')
-rw-r--r--src/mainboard/intel/minnowmax/irqroute.h78
1 files changed, 78 insertions, 0 deletions
diff --git a/src/mainboard/intel/minnowmax/irqroute.h b/src/mainboard/intel/minnowmax/irqroute.h
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+++ b/src/mainboard/intel/minnowmax/irqroute.h
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+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef IRQROUTE_H
+#define IRQROUTE_H
+
+#include <soc/intel/fsp_baytrail/baytrail/irq.h>
+#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+
+/*
+ *IR02h GFX INT(A) - PIRQ A
+ *IR10h EMMC INT(ABCD) - PIRQ DEFG
+ *IR11h SDIO INT(A) - PIRQ B
+ *IR12h SD INT(A) - PIRQ C
+ *IR13h SATA INT(A) - PIRQ D
+ *IR14h XHCI INT(A) - PIRQ E
+ *IR15h LP Audio INT(A) - PIRQ F
+ *IR17h MMC INT(A) - PIRQ F
+ *IR18h SIO INT(ABCD) - PIRQ BADC
+ *IR1Ah TXE INT(A) - PIRQ F
+ *IR1Bh HD Audio INT(A) - PIRQ G
+ *IR1Ch PCIe INT(ABCD) - PIRQ EFGH
+ *IR1Dh EHCI INT(A) - PIRQ D
+ *IR1Eh SIO INT(ABCD) - PIRQ BDEF
+ *IR1Fh LPC INT(ABCD) - PIRQ HGBC
+ */
+#define PCI_DEV_PIRQ_ROUTES \
+ PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(EMMC_DEV, D, E, F, G), \
+ PCI_DEV_PIRQ_ROUTE(SDIO_DEV, B, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SD_DEV, C, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SATA_DEV, D, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(XHCI_DEV, E, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(LPE_DEV, F, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(MMC45_DEV, F, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SIO1_DEV, B, A, D, C), \
+ PCI_DEV_PIRQ_ROUTE(TXE_DEV, F, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(HDA_DEV, G, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(PCIE_DEV, E, F, G, H), \
+ PCI_DEV_PIRQ_ROUTE(EHCI_DEV, D, A, A, A), \
+ PCI_DEV_PIRQ_ROUTE(SIO2_DEV, B, D, E, F), \
+ PCI_DEV_PIRQ_ROUTE(PCU_DEV, H, G, B, C)
+
+/*
+ * Route each PIRQ[A-H] to a PIC IRQ[0-15]
+ * Reserved: 0, 1, 2, 8, 13
+ * PS2 keyboard: 12
+ * ACPI/SCI: 9
+ * Floppy: 6
+ */
+#define PIRQ_PIC_ROUTES \
+ PIRQ_PIC(A, 4), \
+ PIRQ_PIC(B, 5), \
+ PIRQ_PIC(C, 7), \
+ PIRQ_PIC(D, 10), \
+ PIRQ_PIC(E, 11), \
+ PIRQ_PIC(F, 12), \
+ PIRQ_PIC(G, 14), \
+ PIRQ_PIC(H, 15)
+
+#endif /* IRQROUTE_H */