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| author | T Michael Turney <mturney@codeaurora.org> | 2018-03-27 09:33:42 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-04-05 15:56:13 +0000 |
| commit | a12c6019b5221e52c8600410d83a55f596cc89a9 (patch) | |
| tree | 29175ef71299060ee9403ef4a047d3cabf474f1c /src/mainboard/intel/minnowmax/devicetree.cb | |
| parent | ace0c06de1e7246c4da4f534f475b7022becb2c0 (diff) | |
soc/qualcomm/sdm845: Add MMU support
Initialize 1st 4GB as Device Memory, except:
* 1st page: NULL address
* System_IMEM: Cached SRAM
* Boot_IMEM: Cached SRAM
TEST=build
Change-Id: Ic6cf022b08bb2568fdf956cea8bad46da89236c5
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/25201
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/minnowmax/devicetree.cb')
0 files changed, 0 insertions, 0 deletions