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author | Vaibhav Shankar <vaibhav.shankar@intel.com> | 2016-09-14 10:39:29 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-09-14 22:18:15 +0200 |
commit | 8cdeef1c0d1e6453a027642d2504e58ab9ac7152 (patch) | |
tree | e65f1193f103130d89d13525c4405089530bfa6f /src/mainboard/intel/littleplains/dsdt.asl | |
parent | ef8deaffcbfb68c5b15cdc9c91607fce5734ec8b (diff) |
mainboard/google/reef: Configure PERST_0 pin
This configures PERST_0 in devicetree. For boards without
PERST_0, the pin should be disabled. For boards with PERST_0
the correct GPIO needs to be assigned.
BUG=chrome-os-partner:55877
Change-Id: I705009b480e02b4c9b2070bb4f82cb4d552e9a46
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/16603
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/littleplains/dsdt.asl')
0 files changed, 0 insertions, 0 deletions