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authorBrenton Dong <brenton.m.dong@intel.com>2017-01-04 15:12:27 -0700
committerMartin Roth <martinroth@google.com>2017-01-24 18:00:21 +0100
commit5f1f0538cf46cea122c49cc103771fd839d24b37 (patch)
treed0624e13368898997b40be69831d1f1af5d846fe /src/mainboard/intel/leafhill/bootblock.c
parentb46c4ecaba97cc1edbfa2114651fc2bcbf49914b (diff)
mainboard/intel: add leafhill board directory
This commit adds the initial scaffolding for the Intel Leafhill CRB with Apollo Lake silicon. The google/reef directory is used as a template. This commit only makes the minimum changes to Kconfig and Kconfig.name needed for the build bot to not have issues. Change-Id: I088edee0e94ecfb4666fa31e08dbcfd24a81891b Signed-off-by: Brenton Dong <brenton.m.dong@intel.com> Reviewed-on: https://review.coreboot.org/18038 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/intel/leafhill/bootblock.c')
-rw-r--r--src/mainboard/intel/leafhill/bootblock.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/intel/leafhill/bootblock.c b/src/mainboard/intel/leafhill/bootblock.c
new file mode 100644
index 0000000000..57d20d9058
--- /dev/null
+++ b/src/mainboard/intel/leafhill/bootblock.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/variants.h>
+#include <bootblock_common.h>
+#include <ec/ec.h>
+#include <soc/lpc.h>
+#include <soc/gpio.h>
+#include <variant/ec.h>
+
+void bootblock_mainboard_init(void)
+{
+ const struct pad_config *pads;
+ size_t num;
+
+ lpc_configure_pads();
+ pads = variant_early_gpio_table(&num);
+ gpio_configure_pads(pads, num);
+ mainboard_ec_init();
+}