summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/kunimitsu/spd
diff options
context:
space:
mode:
authorMichael Niewöhner <foss@mniewoehner.de>2019-10-09 21:02:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-21 14:23:34 +0000
commitdd321038ac2a4ace231b642ce6664a7d86b41fcc (patch)
tree23049fd62afa91eac4ed7d9c95513d1638b07b7b /src/mainboard/intel/kunimitsu/spd
parentf89cb241eecdf70d9e52c852833c6ed1e3b9632d (diff)
mb/intel/kunimitsu: drop support for FSP 1.1
This patch is part of the patch series to drop support for FSP 1.1 in soc/intel/skylake. The following modifications have been done to migrate the board(s) from FSP 1.1 to FSP 2.0: - remove deprecated devicetree VR_RING domain (only 4 domains in FSP 2.0) - drop FSP-1.1-only romstage.c and spd.c TODO: - testing Change-Id: I9d312ac959a7dac4b018d5ca1d007b1347bcf1dd Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35922 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kunimitsu/spd')
-rw-r--r--src/mainboard/intel/kunimitsu/spd/Makefile.inc1
-rw-r--r--src/mainboard/intel/kunimitsu/spd/spd.c91
-rw-r--r--src/mainboard/intel/kunimitsu/spd/spd.h1
3 files changed, 0 insertions, 93 deletions
diff --git a/src/mainboard/intel/kunimitsu/spd/Makefile.inc b/src/mainboard/intel/kunimitsu/spd/Makefile.inc
index 4fa2d7e5df..814d04df4b 100644
--- a/src/mainboard/intel/kunimitsu/spd/Makefile.inc
+++ b/src/mainboard/intel/kunimitsu/spd/Makefile.inc
@@ -14,7 +14,6 @@
## GNU General Public License for more details.
##
-romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += spd.c
romstage-y += spd_util.c
SPD_BIN = $(obj)/spd.bin
diff --git a/src/mainboard/intel/kunimitsu/spd/spd.c b/src/mainboard/intel/kunimitsu/spd/spd.c
deleted file mode 100644
index db5e24e927..0000000000
--- a/src/mainboard/intel/kunimitsu/spd/spd.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <fsp/soc_binding.h>
-#include <soc/romstage.h>
-#include <stdint.h>
-#include <string.h>
-
-#include "spd.h"
-
-static void mainboard_print_spd_info(uint8_t spd[])
-{
- const int spd_banks[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
- const int spd_capmb[8] = { 1, 2, 4, 8, 16, 32, 64, 0 };
- const int spd_rows[8] = { 12, 13, 14, 15, 16, -1, -1, -1 };
- const int spd_cols[8] = { 9, 10, 11, 12, -1, -1, -1, -1 };
- const int spd_ranks[8] = { 1, 2, 3, 4, -1, -1, -1, -1 };
- const int spd_devw[8] = { 4, 8, 16, 32, -1, -1, -1, -1 };
- const int spd_busw[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
- char spd_name[SPD_PART_LEN+1] = { 0 };
-
- int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
- int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
- int rows = spd_rows[(spd[SPD_ADDRESSING] >> 3) & 7];
- int cols = spd_cols[spd[SPD_ADDRESSING] & 7];
- int ranks = spd_ranks[(spd[SPD_ORGANIZATION] >> 3) & 7];
- int devw = spd_devw[spd[SPD_ORGANIZATION] & 7];
- int busw = spd_busw[spd[SPD_BUS_DEV_WIDTH] & 7];
-
- /* Module type */
- printk(BIOS_INFO, "SPD: module type is ");
- switch (spd[SPD_DRAM_TYPE]) {
- case SPD_DRAM_DDR3:
- printk(BIOS_INFO, "DDR3\n");
- break;
- case SPD_DRAM_LPDDR3:
- printk(BIOS_INFO, "LPDDR3\n");
- break;
- default:
- printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
- break;
- }
-
- /* Module Part Number */
- memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
- spd_name[SPD_PART_LEN] = 0;
- printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
-
- printk(BIOS_INFO,
- "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n",
- banks, ranks, rows, cols, capmb);
- printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n",
- devw, busw);
-
- if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) {
- /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
- printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n",
- capmb / 8 * busw / devw * ranks);
- }
-}
-
-/* Fill SPD pointers for on-board memory */
-void spd_memory_init_params(MEMORY_INIT_UPD *memory_params)
-{
- uintptr_t spd_data;
- spd_data = mainboard_get_spd_data();
-
- /* Make sure a valid SPD was found */
- if (*(uint8_t *)spd_data == 0)
- die("Invalid SPD data.");
-
- memory_params->MemorySpdPtr00 = spd_data;
- if (mainboard_has_dual_channel_mem())
- memory_params->MemorySpdPtr10 = spd_data;
-
- mainboard_print_spd_info((uint8_t *)spd_data);
-}
diff --git a/src/mainboard/intel/kunimitsu/spd/spd.h b/src/mainboard/intel/kunimitsu/spd/spd.h
index 8bc7336470..c6e47f084f 100644
--- a/src/mainboard/intel/kunimitsu/spd/spd.h
+++ b/src/mainboard/intel/kunimitsu/spd/spd.h
@@ -54,7 +54,6 @@ static inline int get_spd_index(void) {
};
return (gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)));
}
-void spd_memory_init_params(MEMORY_INIT_UPD *memory_params);
void mainboard_fill_dq_map_data(void *dq_map_ch0, void *dq_map_ch1);
void mainboard_fill_dqs_map_data(void *dqs_map_ch0, void *dqs_map_ch1);
void mainboard_fill_rcomp_res_data(void *rcomp_ptr);