diff options
author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2016-08-23 13:38:19 +0530 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-09-12 19:56:09 +0200 |
commit | 06868f8154e2036aef4575f5b7c4def7a9ed0de1 (patch) | |
tree | f987c3215b3455d2a35bf524a5c9bbba2322c468 /src/mainboard/intel/kunimitsu/romstage_fsp20.c | |
parent | d2ec56985f08ac481a01430dc371189384023392 (diff) |
kunimitsu: Add initial FSP2.0 support
Add placeholders for functions required when skylake
uses FSP2.0 driver, keeping the fsp1.1 flow intact.
Change-Id: I5446f8cd093af289e0f6022b53a985fa29e32471
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/16301
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/kunimitsu/romstage_fsp20.c')
-rw-r--r-- | src/mainboard/intel/kunimitsu/romstage_fsp20.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/mainboard/intel/kunimitsu/romstage_fsp20.c b/src/mainboard/intel/kunimitsu/romstage_fsp20.c new file mode 100644 index 0000000000..10bdd2108c --- /dev/null +++ b/src/mainboard/intel/kunimitsu/romstage_fsp20.c @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/romstage.h> + +void mainboard_memory_init_params(struct FSPM_UPD *mupd) +{ + /* TODO: Read and copy SPD and fill up Rcomp and DQ param */ +} |