diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2019-10-09 21:02:36 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-21 14:23:34 +0000 |
commit | dd321038ac2a4ace231b642ce6664a7d86b41fcc (patch) | |
tree | 23049fd62afa91eac4ed7d9c95513d1638b07b7b /src/mainboard/intel/kunimitsu/romstage.c | |
parent | f89cb241eecdf70d9e52c852833c6ed1e3b9632d (diff) |
mb/intel/kunimitsu: drop support for FSP 1.1
This patch is part of the patch series to drop support for FSP 1.1 in
soc/intel/skylake.
The following modifications have been done to migrate the board(s) from
FSP 1.1 to FSP 2.0:
- remove deprecated devicetree VR_RING domain (only 4 domains in FSP 2.0)
- drop FSP-1.1-only romstage.c and spd.c
TODO:
- testing
Change-Id: I9d312ac959a7dac4b018d5ca1d007b1347bcf1dd
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kunimitsu/romstage.c')
-rw-r--r-- | src/mainboard/intel/kunimitsu/romstage.c | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/src/mainboard/intel/kunimitsu/romstage.c b/src/mainboard/intel/kunimitsu/romstage.c deleted file mode 100644 index 0312ad1987..0000000000 --- a/src/mainboard/intel/kunimitsu/romstage.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2010 coresystems GmbH - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <gpio.h> -#include <soc/romstage.h> -#include "gpio.h" -#include "spd/spd.h" - -void mainboard_memory_init_params(struct romstage_params *params, - MEMORY_INIT_UPD *memory_params) -{ - spd_memory_init_params(memory_params); - mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0, - &memory_params->DqByteMapCh1); - mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0, - &memory_params->DqsMapCpu2DramCh1); - mainboard_fill_rcomp_res_data(&memory_params->RcompResistor); - mainboard_fill_rcomp_strength_data(&memory_params->RcompTarget); - memory_params->MemorySpdDataLen = SPD_LEN; - memory_params->DqPinsInterleaved = FALSE; -} |