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authorDuncan Laurie <dlaurie@chromium.org>2016-06-22 11:31:51 -0700
committerMartin Roth <martinroth@google.com>2016-06-24 20:14:23 +0200
commit9482cf6c0956f2184c499a125348b09365fcc593 (patch)
tree84df7adba070e8afeaf450ca003929fa72b2b432 /src/mainboard/intel/kunimitsu/devicetree.cb
parenta2be7fbff5db59ca18526ab19c9983368273c947 (diff)
intel/kunimitsu: Move devices from mainboard.asl to devicetree
Declare the mainboard attached devices in the devicetree and enable the provided device drivers by default to generate the ACPI objects for these devices. Then remove the static ACPI objects from the DSDT in mainboard.asl. This was tesed on a Chell mainboard since I lack a kunitmisu device. I used different GPIOs across boots to verify that the different audio codec devices would be "detected" and generated in the SSDT. Change-Id: I9b3b2247a84aeb7c07780958377d5bea14417ce6 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/15317 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/kunimitsu/devicetree.cb')
-rw-r--r--src/mainboard/intel/kunimitsu/devicetree.cb77
1 files changed, 72 insertions, 5 deletions
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index b0d95f414e..4aeb0b1467 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -177,6 +177,9 @@ chip soc/intel/skylake
# Send an extra VR mailbox command for the PS4 exit issue
register "SendVrMbxCmd" = "2"
+ # Use default SD card detect GPIO configuration
+ register "sdcard_cd_gpio_default" = "GPP_A7"
+
device cpu_cluster 0 on
device lapic 0 on end
end
@@ -186,8 +189,23 @@ chip soc/intel/skylake
device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.2 on end # Thermal Subsystem
- device pci 15.0 on end # I2C #0
- device pci 15.1 on end # I2C #1
+ device pci 15.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0001""
+ register "desc" = ""ELAN Touchscreen""
+ register "irq" = "IRQ_EDGE_LOW(GPP_E7_IRQ)"
+ device i2c 10 on end
+ end
+ end # I2C #0
+ device pci 15.1 on
+ chip drivers/i2c/generic
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "IRQ_EDGE_LOW(GPP_B3_IRQ)"
+ register "wake" = "GPE0_DW0_05"
+ device i2c 15 on end
+ end
+ end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
@@ -198,8 +216,50 @@ chip soc/intel/skylake
device pci 17.0 off end # SATA
device pci 19.0 on end # UART #2
device pci 19.1 off end # I2C #5
- device pci 19.2 on end # I2C #4
- device pci 1c.0 on end # PCI Express Port 1
+ device pci 19.2 on
+ chip drivers/i2c/nau8825
+ register "irq" = "IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+ register "jkdet_enable" = "1"
+ register "jkdet_pull_enable" = "1"
+ register "jkdet_pull_up" = "1"
+ register "jkdet_polarity" = "1" # ActiveLow
+ register "vref_impedance" = "2" # 125kOhm
+ register "micbias_voltage" = "6" # 2.754
+ register "sar_threshold_num" = "4"
+ register "sar_threshold[0]" = "0x08"
+ register "sar_threshold[1]" = "0x12"
+ register "sar_threshold[2]" = "0x26"
+ register "sar_threshold[3]" = "0x73"
+ register "sar_hysteresis" = "0"
+ register "sar_voltage" = "6"
+ register "sar_compare_time" = "1" # 1us
+ register "sar_sampling_time" = "1" # 4us
+ register "short_key_debounce" = "3" # 30ms
+ register "jack_insert_debounce" = "7" # 512ms
+ register "jack_eject_debounce" = "0"
+ device i2c 1a on end
+ end
+ chip drivers/i2c/generic
+ register "hid" = ""INT343B""
+ register "desc" = ""SSM4567 Left Speaker Amp""
+ register "uid" = "0"
+ register "device_present_gpio" = "GPP_E3"
+ device i2c 34 on end
+ end
+ chip drivers/i2c/generic
+ register "hid" = ""INT343B""
+ register "desc" = ""SSM4567 Right Speaker Amp""
+ register "uid" = "1"
+ register "device_present_gpio" = "GPP_E3"
+ device i2c 35 on end
+ end
+ end # I2C #4
+ device pci 1c.0 on
+ chip drivers/intel/wifi
+ register "wake" = "GPE0_DW0_16"
+ device pci 00.0 on end
+ end
+ end # PCI Express Port 1
device pci 1c.1 off end # PCI Express Port 2
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
@@ -228,7 +288,14 @@ chip soc/intel/skylake
end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
- device pci 1f.3 on end # Intel HDA
+ device pci 1f.3 on
+ chip drivers/generic/max98357a
+ register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_E3)"
+ register "device_present_gpio" = "GPP_E3"
+ register "device_present_gpio_invert" = "1"
+ device generic 0 on end
+ end
+ end # Intel HDA
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE