diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-06-29 11:37:56 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-07-17 20:19:53 +0200 |
| commit | c42104189bfe3a192c5f1e4b761d7789abee95b3 (patch) | |
| tree | 6c59fc55c95d8306f0622fdad720816c11db6dfb /src/mainboard/intel/kunimitsu/Kconfig | |
| parent | 01464a69b8ceaee0e145fcbe61a99e0a077a2332 (diff) | |
mainboard/intel: Add Skylake based Kunimitsu board
Initial files to support the Kunimitsu board.
Matches chromium tree at 927026db
This board uses the Skylake FSP 1.1 image and does not build without the
FspUpdVpd.h file.
BRANCH=none
BUG=None
TEST=Build and run ChromeOS on kunimitsu
Change-Id: I1017a66bc811af51a0921e864b589ce2cb618082
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kunimitsu/Kconfig')
| -rw-r--r-- | src/mainboard/intel/kunimitsu/Kconfig | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig new file mode 100644 index 0000000000..01ca168d21 --- /dev/null +++ b/src/mainboard/intel/kunimitsu/Kconfig @@ -0,0 +1,56 @@ +if BOARD_INTEL_KUNIMITSU + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select BOARD_ROMSIZE_KB_16384 + select CACHE_ROM + select CHROMEOS + select CHROMEOS_RAMOOPS_DYNAMIC + select CHROMEOS_VBNV_CMOS + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_LPC + select EC_GOOGLE_CHROMEEC_MEC + select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_SMI_HANDLER + select INTEL_PCH_UART_CONSOLE + select LID_SWITCH + select MAINBOARD_HAS_CHROMEOS + select MARK_GRAPHICS_MEM_WRCOMB + select MMCONF_SUPPORT + select MONOTONIC_TIMER_MSR + select SOC_INTEL_SKYLAKE + select VBOOT_OPROM_MATTERS + select VIRTUAL_DEV_SWITCH + +config IRQ_SLOT_COUNT + int + default 18 + +config BOOT_MEDIA_SPI_BUS + hex + default 0 + +config INTEL_PCH_UART_CONSOLE_NUMBER + hex + default 2 + +config MAINBOARD_DIR + string + default "intel/kunimitsu" + +config MAINBOARD_PART_NUMBER + string + default "Kunimitsu" + +config MAX_CPUS + int + default 8 + +config VBOOT_RAMSTAGE_INDEX + hex + default 0x3 + +endif |