diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 03:39:24 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2024-06-26 11:44:02 +0000 |
| commit | dcddc53fde2d559beef998d3c17e9b7a227e3665 (patch) | |
| tree | f3061a3764892f73bc5dd827134a795c275b685f /src/mainboard/intel/kblrvp/variants | |
| parent | 6c83a71b0a803c922b02b613e927d4c49b944c32 (diff) | |
skl mainboards/dt: Move genx_dec settings into LPC device scope
Change-Id: Iecb4851bedb7c9ed7793763d80acbcbb068e8832
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83172
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants')
3 files changed, 10 insertions, 9 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index b57deffd85..be5ba449d6 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -13,9 +13,6 @@ chip soc/intel/skylake register "gpe0_dw1" = "GPP_D" register "gpe0_dw2" = "GPP_E" - # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f - register "gen1_dec" = "0x00fc0801" - # Enable DPTF register "dptf_enable" = "1" @@ -127,6 +124,10 @@ chip soc/intel/skylake device ref emmc on end device ref sdxc on end device ref smbus on end + device ref lpc_espi on + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f + register "gen1_dec" = "0x00fc0801" + end device ref fast_spi on end end end diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index 81557eb8ff..0af8282659 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -3,9 +3,6 @@ chip soc/intel/skylake # GPE configuration register "gpe0_dw0" = "GPP_C" - # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f - register "gen2_dec" = "0x000c0201" - # FSP Configuration register "DspEnable" = "1" @@ -123,6 +120,9 @@ chip soc/intel/skylake device ref pcie_rp9 on end # x1 WLAN device ref pcie_rp10 on end # x1 WIGIG device ref lpc_espi on + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f + register "gen2_dec" = "0x000c0201" + chip drivers/pc80/tpm device pnp 0c31.0 on end end diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index 9e8c8140ac..87bf0d8743 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -10,9 +10,6 @@ chip soc/intel/skylake register "deep_s5_enable_ac" = "1" register "deep_s5_enable_dc" = "1" - # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f - register "gen2_dec" = "0x000c0201" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | @@ -164,6 +161,9 @@ chip soc/intel/skylake device ref pcie_rp5 on end device ref pcie_rp6 on end device ref lpc_espi on + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f + register "gen2_dec" = "0x000c0201" + chip drivers/pc80/tpm device pnp 0c31.0 on end end |