diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-02 18:28:22 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-13 17:32:37 +0000 |
| commit | a1843d8411d3caebd0600421c2b6a4c6b0588c19 (patch) | |
| tree | d1baeb97ea1ca28ca09df0ceb3edd53ef0eea029 /src/mainboard/intel/kblrvp/variants | |
| parent | 8a64ad09a100adf478d65e42e4cc10a18ccc2d16 (diff) | |
soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig
Select `PM_ACPI_TIMER_OPTIONAL` to enable the new PM ACPI Kconfig and
set the FSP option for PM ACPI timer enablement from its value instead
of using the old devicetree option.
Also drop the obsolete devicetree option from soc code and from the
mainboards and add a corresponding Kconfig entry instead.
Change-Id: I10724ccf1647594404cec15c2349ab05b6c9714f
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45955
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants')
4 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index fbf08cde3f..782f3dc524 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -3,7 +3,6 @@ chip soc/intel/skylake # FSP Configuration register "DspEnable" = "0" register "ScsEmmcHs400Enabled" = "0" - register "PmTimerDisabled" = "0" register "serirq_mode" = "SERIRQ_CONTINUOUS" diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index 0754c0735e..397155b789 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -8,7 +8,6 @@ chip soc/intel/skylake # FSP Configuration register "DspEnable" = "1" - register "PmTimerDisabled" = "1" # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index 11f9c01501..e649ed72e7 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -12,9 +12,6 @@ chip soc/intel/skylake # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen2_dec" = "0x000c0201" - # FSP Configuration - register "PmTimerDisabled" = "1" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 78552fcdd5..115e338199 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -6,7 +6,6 @@ chip soc/intel/skylake # FSP Configuration register "ScsEmmcHs400Enabled" = "0" - register "PmTimerDisabled" = "0" register "serirq_mode" = "SERIRQ_CONTINUOUS" |