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authorNico Huber <nico.h@gmx.de>2019-02-23 19:24:51 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-03-01 10:07:10 +0000
commit44e89af6e609874f2f18d30f1e66dce8b5a98eff (patch)
tree2df8c24b9d6d5695e52257cd5211e6df3af3e46b /src/mainboard/intel/kblrvp/variants
parentff79341a807d1754dadeb2001ccd9769ef11a34b (diff)
soc/intel/skylake: Unify serial IRQ options
We had two ways to configure the serial IRQ mode. One time in the devicetree for FSP and one time through Kconfig for coreboot. We'll use `enum serirq_mode` from soc/intel/common/ as a devicetree option instead. As the default is `quiet mode` here and that is the most common mode, this saves us a lot of lines. In four cases kblrvp8, 11 and librem 13v2, 15v3, we had conflicting settings in devicetree and Kconfig. We'll maintain the `continuous` selection, although it might be that coreboot overrode this earlier on the kblrvps. Note: A lot of Google boards have serial IRQ enabled, while the pin seems to be unconnected? Change-Id: I79f0cd302e335d8dcf8bf6bc32f3d40ca6713e5c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/31596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants')
-rw-r--r--src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb2
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb3
3 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
index 51399dc80f..fcd5aabf88 100644
--- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
@@ -54,8 +54,6 @@ chip soc/intel/skylake
# SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s
register "PmConfigSlpAMinAssert" = "0x03"
- # Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled
- register "SerialIrqConfigSirqEnable" = "0x01"
# VR Settings Configuration for 4 Domains
#+----------------+-------+-------+-------+-------+
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
index 119767f48a..436a4ed7d4 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -11,7 +11,7 @@ chip soc/intel/skylake
register "Heci3Enabled" = "0"
register "PmTimerDisabled" = "0"
- register "SerialIrqConfigSirqMode" = "0x01"
+ register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Enable PCIE slot
register "PcieRpEnable[5]" = "1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
index 9753c64e26..8dbaf685a8 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
@@ -10,7 +10,8 @@ chip soc/intel/skylake
register "ScsSdCardEnabled" = "0"
register "HeciEnabled" = "0"
register "PmTimerDisabled" = "0"
- register "SerialIrqConfigSirqMode" = "0x01"
+
+ register "serirq_mode" = "SERIRQ_CONTINUOUS"
# VR Settings Configuration for 5 Domains
#+----------------+-------+-------+-------------+-------------+-------+