diff options
| author | Naresh G Solanki <naresh.solanki@intel.com> | 2016-11-06 13:37:34 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-08 22:47:40 +0100 |
| commit | 647d39f2c72c9f6565fd6f8b4d2ed1c316ea8cd2 (patch) | |
| tree | 952b4d46adb4fc2278346dcb8f7e6bf129ffe353 /src/mainboard/intel/kblrvp/gpio.h | |
| parent | f338fa1f315086324797b1c864d6d33654f4eabc (diff) | |
intel/kblrvp: Update mainboard configuration
Update devicetree.cb as per RVP3 mainboard.
* Enable & configure PCIE ports,
* Enable & configure USB ports,
* Enable SSIC for WWAN,
* Disable unused I2C ports,
* Disable deep S5,
* Disable HDA,
* Update VR config,
Updated gpio.h to disable pull down for SoC power button.
Change-Id: I235a1d44dabef16ded2aaad13aef36ca57f37c8e
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17247
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/gpio.h')
| -rw-r--r-- | src/mainboard/intel/kblrvp/gpio.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/kblrvp/gpio.h b/src/mainboard/intel/kblrvp/gpio.h index f8ee994b8f..5e251d846c 100644 --- a/src/mainboard/intel/kblrvp/gpio.h +++ b/src/mainboard/intel/kblrvp/gpio.h @@ -185,7 +185,7 @@ static const struct pad_config gpio_table[] = { /* PCH_BATLOW */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1), /* AC_PRESENT */ PAD_CFG_NF(GPD1, NONE, DEEP, NF1), /* PCH_WAKE */ PAD_CFG_NF(GPD2, NONE, DEEP, NF1), -/* PCH_PWRBTN */ PAD_CFG_NF(GPD3, 20K_PD, DEEP, NF1), +/* PCH_PWRBTN */ PAD_CFG_NF(GPD3, NONE, DEEP, NF1), /* PM_SLP_S3# */ PAD_CFG_NF(GPD4, NONE, DEEP, NF1), /* PM_SLP_S4# */ PAD_CFG_NF(GPD5, NONE, DEEP, NF1), /* PM_SLP_SA# */ PAD_CFG_NF(GPD6, NONE, DEEP, NF1), @@ -204,4 +204,4 @@ static const struct pad_config early_gpio_table[] = { #endif -#endif
\ No newline at end of file +#endif |