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authorNaresh G Solanki <naresh.solanki@intel.com>2016-11-10 22:20:14 +0530
committerMartin Roth <martinroth@google.com>2016-11-14 17:17:38 +0100
commitb5580ad55f02980b24330276524b58b3afebb7e7 (patch)
treeb70987a86cfb00f5566485dc72bdfcf62cd5f16f /src/mainboard/intel/kblrvp/devicetree.cb
parent3d302b03f46fa6ed5927cdc2ef9f53b9ce0262ae (diff)
intel/kblrvp: Enable TPM
Add choice to build without TPM, TPM 1.2 support or TPM 2.0 support. Additionally configure lpc clock pad used with LPC TPM & update devicetree.cb. Change-Id: I1c24fdefa6e73637b3037ecf118559abe5fde300 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17367 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel/kblrvp/devicetree.cb')
-rw-r--r--src/mainboard/intel/kblrvp/devicetree.cb6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/intel/kblrvp/devicetree.cb b/src/mainboard/intel/kblrvp/devicetree.cb
index 104a454963..11d5062664 100644
--- a/src/mainboard/intel/kblrvp/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/devicetree.cb
@@ -247,7 +247,11 @@ chip soc/intel/skylake
device pci 1e.4 on end # eMMC
device pci 1e.5 off end # SDIO
device pci 1e.6 on end # SDCard
- device pci 1f.0 on end # LPC Interface
+ device pci 1f.0 on
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+ end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.3 on end # Intel HDA