summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/kblrvp/Kconfig
diff options
context:
space:
mode:
authorPraveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>2018-11-09 18:15:24 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-01-16 11:56:50 +0000
commitd6e00546a4cdce308a6a5480887ac03d94c3b826 (patch)
treed1805ebc911ecd3a0880e55235dbe16bc0cb3cc4 /src/mainboard/intel/kblrvp/Kconfig
parent5c29daa150c5ba0a8acbdec90013f6526ac8d1f7 (diff)
mb/intel/kblrvp: Add new Kaby lake RVP11 support
The RVP11 is a dual-channel DDR4 SO-DIMM on skylake H platform. This patch add following chages - Add overridetree.cb for RVP11 - Select skylake PCH-H chipset config for RVP11. - Add GPIO table as per board schematics. - Add audio verb table for RVP11. - Set the UserBd UPD to BOARD_TYPE_DESKTOP. BUG=None TEST= Build and flash, confirm boot into yocto OS on KBL RVP11 platform. verified PCI, USB, ethernet, SATA, display, audio and power functionalities. Signed-off-by: Praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com> Change-Id: Id86f56df06795601cc9d7830766e54396d218e00 Reviewed-on: https://review.coreboot.org/c/29809 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kblrvp/Kconfig')
-rw-r--r--src/mainboard/intel/kblrvp/Kconfig8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig
index e3852894ed..c3a0400b59 100644
--- a/src/mainboard/intel/kblrvp/Kconfig
+++ b/src/mainboard/intel/kblrvp/Kconfig
@@ -1,4 +1,5 @@
-if BOARD_INTEL_KBLRVP3 || BOARD_INTEL_KBLRVP7 || BOARD_INTEL_KBLRVP8
+if BOARD_INTEL_KBLRVP3 || BOARD_INTEL_KBLRVP7 || BOARD_INTEL_KBLRVP8 \
+ || BOARD_INTEL_KBLRVP11
config BOARD_SPECIFIC_OPTIONS
def_bool y
@@ -9,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_OPTION_TABLE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB if !BOARD_INTEL_KBLRVP8
select SOC_INTEL_SKYLAKE
- select SKYLAKE_SOC_PCH_H if BOARD_INTEL_KBLRVP8
+ select SKYLAKE_SOC_PCH_H if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11
select MAINBOARD_USES_FSP2_0
select MAINBOARD_HAS_CHROMEOS
select GENERIC_SPD_BIN
@@ -31,6 +32,7 @@ config VARIANT_DIR
default "rvp3" if BOARD_INTEL_KBLRVP3
default "rvp7" if BOARD_INTEL_KBLRVP7
default "rvp8" if BOARD_INTEL_KBLRVP8
+ default "rvp11" if BOARD_INTEL_KBLRVP11
config MAINBOARD_PART_NUMBER
string
@@ -81,5 +83,5 @@ config PRERAM_CBMEM_CONSOLE_SIZE
config DIMM_SPD_SIZE
int
- default 512 if BOARD_INTEL_KBLRVP8 #DDR4
+ default 512 if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11 #DDR4
endif