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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-02 10:17:10 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-15 10:25:23 +0100
commit633f6e36fa49964258ce37265deda626cec79ca9 (patch)
treecc1bed00f57692cb89b10df2a6c034706f697b89 /src/mainboard/intel/jarrell/romstage.c
parent84437989991ac29e0957625f6333c4b857a4ad45 (diff)
mainboard/*/debug.c: Remove duplicate or dead code
We already have these implemented in 'lib/debug.c'. Will fix '.c' includes in follow ups. Change-Id: I1586d8864db7f93515214ef9a4458ebc618bf61c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7316 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Diffstat (limited to 'src/mainboard/intel/jarrell/romstage.c')
-rw-r--r--src/mainboard/intel/jarrell/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index f1cf4c3e1f..fb4d4834f9 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -18,6 +18,7 @@
#include "northbridge/intel/e7520/memory_initialized.c"
#include "cpu/x86/bist.h"
#include <spd.h>
+#include "lib/debug.c" // XXX
#define SIO_GPIO_BASE 0x680
#define SIO_XBUS_BASE 0x4880
@@ -35,7 +36,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/e7520/raminit.c"
#include "lib/generic_sdram.c"
-#include "debug.c"
#include "arch/x86/lib/stages.c"
#include <cpu/intel/romstage.h>