aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/intel/icelake_rvp
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2019-04-29 13:58:43 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-05-02 06:03:15 +0000
commitffb83bee2627f1e33f8302a3e630e036e93891a9 (patch)
treec3d133fedb9d84637cc51c03190f61f353587e9c /src/mainboard/intel/icelake_rvp
parent67524b57af238490de9d00ba0caf08dfb73a2b10 (diff)
soc/intel/icelake: Select FSP_M_XIP
This patch ports CB:32275 changes from CNL to ICL. Ice Lake require that FSP-M component should be XIP. This change selects FSP_M_XIP so that the right arguments are passed into cbfstool when adding this component. Change-Id: Icc5550f1f94957fa1b28c8bba6fc0efee98e233e Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32507 Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/icelake_rvp')
0 files changed, 0 insertions, 0 deletions