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author | Subrata Banik <subrata.banik@intel.com> | 2018-11-20 14:32:58 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-09 02:47:55 +0000 |
commit | 4b8f5a351799dd22d8924b8bea4a3e666893f965 (patch) | |
tree | 891b155595418bf32f5a76c8cf2be0ee4440bbb7 /src/mainboard/intel/icelake_rvp/romstage_fsp_params.c | |
parent | 2ee8fe0094da413fe57796131d7c3b9f927f68a1 (diff) |
mb/google/dragonegg: Pass FSP-M UPD as per dragonegg requirement
TEST=Able to boot dragonegg board with LPDDR4 memory.
Change-Id: Idbe0aa79879f2b1a754dd1f6718ad4ba1173e760
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31956
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/icelake_rvp/romstage_fsp_params.c')
0 files changed, 0 insertions, 0 deletions