mainboard/intel/harcuvar: Add support for Intel Harcuvar CRB

The Harcuvar CRB is a reference platform of Intel Atom C3000 SoC
("Denverton" and "Denverton-NS") for the communications segment/market.
The MohonPeak coreboot was used as the starting template with
additions/modifications from other Intel Apollo Lake/Skylake coreboot.
Tested with TianoCore payload (UDK2015) and Poky (Yocto
Project Reference Distro) 2.0 with kernel 4.1.8 booted from
SATA drive and external USB pendrive.

Change-Id: I088833e36e2d22d1fe1610b8dca1454092da511a
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/20862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>

1 files changed, 56 insertions, 0 deletions

diff --git a/src/mainboard/intel/harcuvar/ramstage.c b/src/mainboard/intel/harcuvar/ramstage.c
new file mode 100644
index 0000000000..4d908587f9
--- /dev/null
+++ b/src/mainboard/intel/harcuvar/ramstage.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 - 2017 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <console/console.h>
+#include <fsp/api.h>
+#include <soc/ramstage.h>
+#include "emmc.h"
+
+static int get_emmc_dll_info(uint16_t signature, size_t num_of_entry,
+			     BL_EMMC_INFORMATION **config)
+{
+	uint8_t entry;
+
+	if ((signature == 0) || (num_of_entry == 0) || (*config == NULL))
+		return 1;
+
+	for (entry = 0; entry < num_of_entry; entry++) {
+		if ((*config)[entry].Signature == signature) {
+			*config = &(*config)[entry];
+			return 0;
+		}
+	}
+
+	return 1;
+}
+
+void mainboard_silicon_init_params(FSPS_UPD *params)
+{
+	size_t num;
+	uint16_t emmc_dll_sign;
+	BL_EMMC_INFORMATION *emmc_config;
+
+	/* Configure eMMC DLL PCD */
+	emmc_dll_sign = DEFAULT_EMMC_DLL_SIGN;
+	num = ARRAY_SIZE(harcuvar_emmc_config);
+	emmc_config = harcuvar_emmc_config;
+
+	if (get_emmc_dll_info(emmc_dll_sign, num, &emmc_config))
+		die("eMMC DLL Configuration is invalid, please correct it!");
+
+	params->FspsConfig.PcdEMMCDLLConfigPtr =
+		(uint32_t)&emmc_config->eMMCDLLConfig;
+}