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authorSean Rhodes <sean@starlabs.systems>2022-06-08 21:41:53 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-06-20 12:06:56 +0000
commit9088b681f539873e70a8904ca41165f3e830232f (patch)
tree2454d6d4ecd3c11dd87a9d0f516725cd25632d6c /src/mainboard/intel/glkrvp/variants
parentae64b6e5db2e35b45e76ee4ef9ec416a6f09384e (diff)
soc/intel/apollolake: Hook up UfsEnabled to devicetree
Hook up FSP S UfsEnabled UPD (1d.0) to devicetree. UFS only exist on GLK, and has been there since its initial releases. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1976bfd340c728c64aaf36d296ac41dcd47bfc61 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/intel/glkrvp/variants')
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index 75d69d309a..f025d1fd0a 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -177,6 +177,7 @@ chip soc/intel/apollolake
device pci 1a.0 on end # - PWM
device pci 1b.0 on end # - SDCARD
device pci 1c.0 on end # - eMMC
+ device pci 1d.0 on end # - UFS
device pci 1e.0 off end # - SDIO
device pci 1f.0 on # - LPC
chip drivers/pc80/tpm