diff options
author | Hannah Williams <hannah.williams@intel.com> | 2017-05-05 16:39:21 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-26 20:31:24 +0000 |
commit | d59f62bbdabeb98f12896c6af0ef50cbf25e013f (patch) | |
tree | ee22acd54dce71c326c019ee41f86c310f2b0df6 /src/mainboard/intel/glkrvp/touchpad.asl | |
parent | 50ab84fa370ac247dfe57a65f9d9b1ed0384e7fa (diff) |
mainboard/intel/glkrvp: Add support for GLKRVP
GLKRVP is a reference board for GLK SOC
RVP1 has DDR4 and RVP2 has LPDDR4
RVP2 is enabled by default and CONFIG_IS_GLK_RVP_1 should be selected
if building for RVP1
GLKRVP can work with internal Intel EC or external Chrome EC AIC.
For internal EC, CONFIG_EC_GOOGLE_CHROMEEC will not be selected (
CONFIG_GLK_INTEL_EC should be selected for internal EC config)
By default, CONFIG_GLK_CHROME_EC is selected for external ChromeEC AIC
config.
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Change-Id: Iab688aca6a4f5c5e32801215ba3a1a440e50fbef
Reviewed-on: https://review.coreboot.org/19604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/glkrvp/touchpad.asl')
-rw-r--r-- | src/mainboard/intel/glkrvp/touchpad.asl | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/src/mainboard/intel/glkrvp/touchpad.asl b/src/mainboard/intel/glkrvp/touchpad.asl new file mode 100644 index 0000000000..6168fbbca3 --- /dev/null +++ b/src/mainboard/intel/glkrvp/touchpad.asl @@ -0,0 +1,76 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + Scope (\_SB.PCI0.I2C4) + { + Device (TPAD) + { + Name(_ADR, One) + Name (_HID, "ALPS0001") + Name (_CID, "PNP0C50") + Name (_DDN, "ALPS Touchpad") + Name (_UID, 1) + Name (ISTP, 1) /* Touchpad */ + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + 0x2C, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.PCI0.I2C4", // ResourceSource + ) + Interrupt (ResourceConsumer, Level, ActiveLow) + { + GPIO_18_IRQ + } + GpioInt (Level, ActiveLow, ExclusiveAndWake, PullUp, 0x0000, "\\_SB.GPO1", 0x00, ResourceConsumer, ,) + { + 18 + } + }) + + Method (_STA) + { + Return (0xF) + } + Method(_DSM, 0x4, NotSerialized) + { + // DSM UUID for HIDI2C - HID driver does not load without DSM + If(LEqual(Arg0, ToUUID("3CDFF6F7-4267-4555-AD05-B30A3D8938DE"))) + { + // Function 0 : Query Function + If(LEqual(Arg2, Zero)) + { + // Revision 1 + If(LEqual(Arg1, One)) + { + Return (Buffer (One) {0x03}) + } + Else + { + Return (Buffer (One) {0x00}) + } + } ElseIf (LEqual(Arg2, One)) { // Function 1 : HID Function + // HID Descriptor Address (IHV Specific) + Return(0x0020) + } Else { + Return (Buffer (One) {0x00}) + } + } Else { + Return (Buffer (One) {0x00}) + } + } + } +} |