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authorMaxim Polyakov <max.senia.poliak@gmail.com>2024-09-25 10:40:22 +0300
committerFelix Held <felix-coreboot@felixheld.de>2024-10-01 15:11:14 +0000
commit6b2d756be2375ee4e7b90878ce926ead9cdece17 (patch)
tree1552114619e857d10e0ac1396d93bc50dbb9d385 /src/mainboard/intel/glkrvp/chromeos.c
parent3ba7ab256c23e597a9b11eab62538d0cc94b7296 (diff)
soc/intel/cannonlake: Fix USB port numbers
It should be in HEX. Change-Id: I15a354bae414ad94a2f76030b3099179022b935c Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84546 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/glkrvp/chromeos.c')
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